[v2] raw/ioat: fix queue index calculation
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Commit Message
Coverity flags a possible problem where the 8-bit wq_idx value may have
errors when shifted and sign-extended to pointer size. Since this can
only occur if the shift index is larger than any expected value from
hardware, it's unlikely to cause any real problems, but we can eliminate
any possible errors, and the coverity issue, by explicitly typecasting
the uint8_t value to uintptr_t before any shift operations occur.
Coverity issue: 363695
Fixes: a33969462135 ("raw/ioat: fix work-queue config size")
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
---
V2: Change uint64_t cast to uintptr_t to prevent 32-bit build issues
---
drivers/raw/ioat/idxd_pci.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
Comments
05/11/2020 11:41, Bruce Richardson:
> Coverity flags a possible problem where the 8-bit wq_idx value may have
> errors when shifted and sign-extended to pointer size. Since this can
> only occur if the shift index is larger than any expected value from
> hardware, it's unlikely to cause any real problems, but we can eliminate
> any possible errors, and the coverity issue, by explicitly typecasting
> the uint8_t value to uintptr_t before any shift operations occur.
>
> Coverity issue: 363695
> Fixes: a33969462135 ("raw/ioat: fix work-queue config size")
>
> Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Applied, thanks
@@ -47,7 +47,8 @@ idxd_pci_dev_command(struct idxd_rawdev *idxd, enum rte_idxd_cmds command)
static uint32_t *
idxd_get_wq_cfg(struct idxd_pci_common *pci, uint8_t wq_idx)
{
- return RTE_PTR_ADD(pci->wq_regs_base, wq_idx << (5 + pci->wq_cfg_sz));
+ return RTE_PTR_ADD(pci->wq_regs_base,
+ (uintptr_t)wq_idx << (5 + pci->wq_cfg_sz));
}
static int