[v4,1/2] net/mlx5: fix Rx queue count calculation
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Commit Message
The commit d2d57605522d ("net/mlx5: fix Rx queue count calculation") is
incorrect because the count calculation is wrong for the next cqe:
Example:
Compressed Set of packets 1 | Compressed Set of packets 2
C | a | e0 | e1 | e2 | e3 | e4 | e5 | C | a | e0
There are 2 compressed set of packets in the first queue. For the first
set, n is computed correctly.
But for the second, n is not computed properly. Because the zip context
is for the first set. The second set is not yet decompressed, so
there are no context.
To fix the issue, we should only use the zip context for the first CQEs
series.
Fixes: d2d57605522d ("net/mlx5: fix Rx queue count calculation")
Signed-off-by: Maxime Leroy <maxime.leroy@6wind.com>
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
---
drivers/net/mlx5/mlx5_rxtx.c | 16 ++++++++++------
1 file changed, 10 insertions(+), 6 deletions(-)
Comments
> -----Original Message-----
> From: Maxime Leroy <maxime.leroy@6wind.com>
> Sent: Tuesday, November 17, 2020 13:27
> To: Matan Azrad <matan@nvidia.com>; Shahaf Shuler <shahafs@nvidia.com>;
> Slava Ovsiienko <viacheslavo@nvidia.com>; Alexander Kozyrev
> <akozyrev@nvidia.com>
> Cc: dev@dpdk.org; NBU-Contact-N?lio Laranjeiro
> <nelio.laranjeiro@6wind.com>
> Subject: [PATCH v4 1/2] net/mlx5: fix Rx queue count calculation
>
> The commit d2d57605522d ("net/mlx5: fix Rx queue count calculation") is
> incorrect because the count calculation is wrong for the next cqe:
>
> Example:
>
> Compressed Set of packets 1 | Compressed Set of packets 2
> C | a | e0 | e1 | e2 | e3 | e4 | e5 | C | a | e0
>
> There are 2 compressed set of packets in the first queue. For the first set, n is
> computed correctly.
>
> But for the second, n is not computed properly. Because the zip context is for
> the first set. The second set is not yet decompressed, so there are no context.
>
> To fix the issue, we should only use the zip context for the first CQEs series.
>
> Fixes: d2d57605522d ("net/mlx5: fix Rx queue count calculation")
> Signed-off-by: Maxime Leroy <maxime.leroy@6wind.com>
> Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
@@ -462,11 +462,18 @@ rx_queue_count(struct mlx5_rxq_data *rxq)
{
struct rxq_zip *zip = &rxq->zip;
volatile struct mlx5_cqe *cqe;
- unsigned int cq_ci = rxq->cq_ci;
const unsigned int cqe_n = (1 << rxq->cqe_n);
const unsigned int cqe_cnt = cqe_n - 1;
- unsigned int used = 0;
+ unsigned int cq_ci, used;
+ /* if we are processing a compressed cqe */
+ if (zip->ai) {
+ used = zip->cqe_cnt - zip->ai;
+ cq_ci = zip->cq_ci;
+ } else {
+ used = 0;
+ cq_ci = rxq->cq_ci;
+ }
cqe = &(*rxq->cqes)[cq_ci & cqe_cnt];
while (check_cqe(cqe, cqe_n, cq_ci) != MLX5_CQE_STATUS_HW_OWN) {
int8_t op_own;
@@ -474,10 +481,7 @@ rx_queue_count(struct mlx5_rxq_data *rxq)
op_own = cqe->op_own;
if (MLX5_CQE_FORMAT(op_own) == MLX5_COMPRESSED)
- if (unlikely(zip->ai))
- n = zip->cqe_cnt - zip->ai;
- else
- n = rte_be_to_cpu_32(cqe->byte_cnt);
+ n = rte_be_to_cpu_32(cqe->byte_cnt);
else
n = 1;
cq_ci += n;