[v5] doc: add Rx functions limitations in mlx5 guide

Message ID 20201126235522.2059857-1-thomas@monjalon.net (mailing list archive)
State Accepted, archived
Headers
Series [v5] doc: add Rx functions limitations in mlx5 guide |

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Context Check Description
ci/checkpatch success coding style OK
ci/travis-robot success Travis build: passed

Commit Message

Thomas Monjalon Nov. 26, 2020, 11:55 p.m. UTC
  From: Asaf Penso <asafp@nvidia.com>

The mlx5 PMD supports various Rx burst functions.
Each function is enabled differently and supports different features.

Signed-off-by: Asaf Penso <asafp@nvidia.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
---
v5: fix formatting by using a table
---
 doc/guides/nics/mlx5.rst | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)
  

Comments

Thomas Monjalon Nov. 27, 2020, 12:04 a.m. UTC | #1
27/11/2020 00:55, Thomas Monjalon:
> From: Asaf Penso <asafp@nvidia.com>
> 
> The mlx5 PMD supports various Rx burst functions.
> Each function is enabled differently and supports different features.
> 
> Signed-off-by: Asaf Penso <asafp@nvidia.com>
> Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
> ---
> v5: fix formatting by using a table

Applied
  

Patch

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index e96aca21eb..6858e81f72 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -1345,6 +1345,29 @@  Performance tuning
    - Configure per-lcore cache when creating Mempools for packet buffer.
    - Refrain from dynamically allocating/freeing memory in run-time.
 
+Rx burst functions
+------------------
+
+There are multiple Rx burst functions with different advantages and limitations.
+
+.. table:: Rx burst functions
+
+   +-------------------+------------------------+---------+-----------------+------+-------+
+   || Function Name    || Enabler               || Scatter|| Error Recovery || CQE || Large|
+   |                   |                        |         |                 || comp|| MTU  |
+   +===================+========================+=========+=================+======+=======+
+   | rx_burst          | rx_vec_en=0            |   Yes   | Yes             |  Yes |  Yes  |
+   +-------------------+------------------------+---------+-----------------+------+-------+
+   | rx_burst_vec      | rx_vec_en=1 (default)  |   No    | if CQE comp off |  Yes |  No   |
+   +-------------------+------------------------+---------+-----------------+------+-------+
+   | rx_burst_mprq     || mprq_en=1             |   No    | Yes             |  Yes |  Yes  |
+   |                   || RxQs >= rxqs_min_mprq |         |                 |      |       |
+   +-------------------+------------------------+---------+-----------------+------+-------+
+   | rx_burst_mprq_vec || rx_vec_en=1 (default) |   No    | if CQE comp off |  Yes |  Yes  |
+   |                   || mprq_en=1             |         |                 |      |       |
+   |                   || RxQs >= rxqs_min_mprq |         |                 |      |       |
+   +-------------------+------------------------+---------+-----------------+------+-------+
+
 .. _mlx5_offloads_support:
 
 Supported hardware offloads