diff mbox series

[v2] net/ixgbe: fix fdirctrl register setting

Message ID 20201215101031.99657-1-dapengx.yu@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Qi Zhang
Headers
Series [v2] net/ixgbe: fix fdirctrl register setting |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-testing success Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/Intel-compilation success Compilation OK
ci/travis-robot success Travis build: passed

Commit Message

Yu, DapengX Dec. 15, 2020, 10:10 a.m. UTC 
  From: YU DAPENG <dapengx.yu@intel.com>

The function ixgbe_fdir_set_flexbytes_offset is used when create FDir
rule for flexbytes. It set a register: FDIRCTRL.FLEX_OFFSET, which
cause that even if the FDir flexbytes rule is destroyed, the rule still
direct the packet and transfer it to the wrong place. It is because
setting FDIRCTRL shall only be permitted on Flow Director
initialization flow or clearing the Flow Director table according to
intel datasheet, otherwise unexpected happens. In order to evade the
limit, add code to set FDIRCMD.CLEARHT to 1b and then clear it back to
0b to make the setting act like the Flow Director initialization flow
or clearing the Flow Director table.

Fixes: f35fec63dde1 ("net/ixgbe: enable flex bytes for generic flow API")
Cc: stable@dpdk.org

Signed-off-by: YU DAPENG <dapengx.yu@intel.com>
---
 drivers/net/ixgbe/ixgbe_fdir.c | 29 +++++++++++++++++++++++++++++
 drivers/net/ixgbe/ixgbe_flow.c | 15 ++++++++-------
 2 files changed, 37 insertions(+), 7 deletions(-)

Comments

Zhou, JunX W Dec. 22, 2020, 6:51 a.m. UTC | #1 
Tested-by: Zhou, Jun <junx.w.zhou@intel.com> 

-----Original Message-----
From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of dapengx.yu@intel.com
Sent: Tuesday, December 15, 2020 6:11 PM
To: Guo, Jia <jia.guo@intel.com>
Cc: dev@dpdk.org; Yu, DapengX <dapengx.yu@intel.com>; stable@dpdk.org
Subject: [dpdk-dev] [PATCH v2] net/ixgbe: fix fdirctrl register setting

From: YU DAPENG <dapengx.yu@intel.com>

The function ixgbe_fdir_set_flexbytes_offset is used when create FDir rule for flexbytes. It set a register: FDIRCTRL.FLEX_OFFSET, which cause that even if the FDir flexbytes rule is destroyed, the rule still direct the packet and transfer it to the wrong place. It is because setting FDIRCTRL shall only be permitted on Flow Director initialization flow or clearing the Flow Director table according to intel datasheet, otherwise unexpected happens. In order to evade the limit, add code to set FDIRCMD.CLEARHT to 1b and then clear it back to 0b to make the setting act like the Flow Director initialization flow or clearing the Flow Director table.

Fixes: f35fec63dde1 ("net/ixgbe: enable flex bytes for generic flow API")
Cc: stable@dpdk.org

Signed-off-by: YU DAPENG <dapengx.yu@intel.com>
---
 drivers/net/ixgbe/ixgbe_fdir.c | 29 +++++++++++++++++++++++++++++  drivers/net/ixgbe/ixgbe_flow.c | 15 ++++++++-------
 2 files changed, 37 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ixgbe/ixgbe_fdir.c b/drivers/net/ixgbe/ixgbe_fdir.c index a0fab5070..11b9effeb 100644
--- a/drivers/net/ixgbe/ixgbe_fdir.c
+++ b/drivers/net/ixgbe/ixgbe_fdir.c
@@ -503,9 +503,30 @@ ixgbe_fdir_set_flexbytes_offset(struct rte_eth_dev *dev,
 				uint16_t offset)
 {
 	struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+	struct ixgbe_hw_fdir_info *fdir_info =
+		IXGBE_DEV_PRIVATE_TO_FDIR_INFO(dev->data->dev_private);
 	uint32_t fdirctrl;
 	int i;
 
+	if (fdir_info->flex_bytes_offset == offset)
+		return 0;
+
+	/**
+	 * 82599 adapters flow director init flow cannot be restarted,
+	 * Workaround 82599 silicon errata by performing the following steps
+	 * before re-writing the FDIRCTRL control register with the same value.
+	 * - write 1 to bit 8 of FDIRCMD register &
+	 * - write 0 to bit 8 of FDIRCMD register
+	 */
+	IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD,
+			(IXGBE_READ_REG(hw, IXGBE_FDIRCMD) |
+			 IXGBE_FDIRCMD_CLEARHT));
+	IXGBE_WRITE_FLUSH(hw);
+	IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD,
+			(IXGBE_READ_REG(hw, IXGBE_FDIRCMD) &
+			 ~IXGBE_FDIRCMD_CLEARHT));
+	IXGBE_WRITE_FLUSH(hw);
+
 	fdirctrl = IXGBE_READ_REG(hw, IXGBE_FDIRCTRL);
 
 	fdirctrl &= ~IXGBE_FDIRCTRL_FLEX_MASK; @@ -520,6 +541,14 @@ ixgbe_fdir_set_flexbytes_offset(struct rte_eth_dev *dev,
 			break;
 		msec_delay(1);
 	}
+
+	if (i >= IXGBE_FDIR_INIT_DONE_POLL) {
+		PMD_DRV_LOG(ERR, "Flow Director poll time exceeded!");
+		return -ETIMEDOUT;
+	}
+
+	fdir_info->flex_bytes_offset = offset;
+
 	return 0;
 }
 
diff --git a/drivers/net/ixgbe/ixgbe_flow.c b/drivers/net/ixgbe/ixgbe_flow.c index 39f6ed73f..9aeb2e4a4 100644
--- a/drivers/net/ixgbe/ixgbe_flow.c
+++ b/drivers/net/ixgbe/ixgbe_flow.c
@@ -3137,13 +3137,13 @@ ixgbe_flow_create(struct rte_eth_dev *dev,
 				rte_memcpy(&fdir_info->mask,
 					&fdir_rule.mask,
 					sizeof(struct ixgbe_hw_fdir_mask));
-				fdir_info->flex_bytes_offset =
-					fdir_rule.flex_bytes_offset;
 
-				if (fdir_rule.mask.flex_bytes_mask)
-					ixgbe_fdir_set_flexbytes_offset(dev,
+				if (fdir_rule.mask.flex_bytes_mask) {
+					ret = ixgbe_fdir_set_flexbytes_offset(dev,
 						fdir_rule.flex_bytes_offset);
-
+					if (ret)
+						goto out;
+				}
 				ret = ixgbe_fdir_set_input_mask(dev);
 				if (ret)
 					goto out;
@@ -3161,8 +3161,9 @@ ixgbe_flow_create(struct rte_eth_dev *dev,
 				if (ret)
 					goto out;
 
-				if (fdir_info->flex_bytes_offset !=
-						fdir_rule.flex_bytes_offset)
+				if (fdir_rule.mask.flex_bytes_mask &&
+				    fdir_info->flex_bytes_offset !=
+				    fdir_rule.flex_bytes_offset)
 					goto out;
 			}
 		}
--
2.26.2.windows.1
Guo, Jia Dec. 22, 2020, 7:23 a.m. UTC | #2 
Acked-by: Jeff Guo <jia.guo@intel.com>

> -----Original Message-----
> From: Zhou, JunX W <junx.w.zhou@intel.com>
> Sent: Tuesday, December 22, 2020 2:51 PM
> To: Yu, DapengX <dapengx.yu@intel.com>; Guo, Jia <jia.guo@intel.com>
> Cc: dev@dpdk.org; Yu, DapengX <dapengx.yu@intel.com>; stable@dpdk.org
> Subject: RE: [dpdk-dev] [PATCH v2] net/ixgbe: fix fdirctrl register setting
> 
> Tested-by: Zhou, Jun <junx.w.zhou@intel.com>
> 
> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of
> dapengx.yu@intel.com
> Sent: Tuesday, December 15, 2020 6:11 PM
> To: Guo, Jia <jia.guo@intel.com>
> Cc: dev@dpdk.org; Yu, DapengX <dapengx.yu@intel.com>; stable@dpdk.org
> Subject: [dpdk-dev] [PATCH v2] net/ixgbe: fix fdirctrl register setting
> 
> From: YU DAPENG <dapengx.yu@intel.com>
> 
> The function ixgbe_fdir_set_flexbytes_offset is used when create FDir rule
> for flexbytes. It set a register: FDIRCTRL.FLEX_OFFSET, which cause that even
> if the FDir flexbytes rule is destroyed, the rule still direct the packet and
> transfer it to the wrong place. It is because setting FDIRCTRL shall only be
> permitted on Flow Director initialization flow or clearing the Flow Director
> table according to intel datasheet, otherwise unexpected happens. In order
> to evade the limit, add code to set FDIRCMD.CLEARHT to 1b and then clear it
> back to 0b to make the setting act like the Flow Director initialization flow or
> clearing the Flow Director table.
> 
> Fixes: f35fec63dde1 ("net/ixgbe: enable flex bytes for generic flow API")
> Cc: stable@dpdk.org
> 
> Signed-off-by: YU DAPENG <dapengx.yu@intel.com>
> ---
>  drivers/net/ixgbe/ixgbe_fdir.c | 29 +++++++++++++++++++++++++++++
> drivers/net/ixgbe/ixgbe_flow.c | 15 ++++++++-------
>  2 files changed, 37 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/net/ixgbe/ixgbe_fdir.c b/drivers/net/ixgbe/ixgbe_fdir.c
> index a0fab5070..11b9effeb 100644
> --- a/drivers/net/ixgbe/ixgbe_fdir.c
> +++ b/drivers/net/ixgbe/ixgbe_fdir.c
> @@ -503,9 +503,30 @@ ixgbe_fdir_set_flexbytes_offset(struct rte_eth_dev
> *dev,
>  				uint16_t offset)
>  {
>  	struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data-
> >dev_private);
> +	struct ixgbe_hw_fdir_info *fdir_info =
> +		IXGBE_DEV_PRIVATE_TO_FDIR_INFO(dev->data-
> >dev_private);
>  	uint32_t fdirctrl;
>  	int i;
> 
> +	if (fdir_info->flex_bytes_offset == offset)
> +		return 0;
> +
> +	/**
> +	 * 82599 adapters flow director init flow cannot be restarted,
> +	 * Workaround 82599 silicon errata by performing the following steps
> +	 * before re-writing the FDIRCTRL control register with the same
> value.
> +	 * - write 1 to bit 8 of FDIRCMD register &
> +	 * - write 0 to bit 8 of FDIRCMD register
> +	 */
> +	IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD,
> +			(IXGBE_READ_REG(hw, IXGBE_FDIRCMD) |
> +			 IXGBE_FDIRCMD_CLEARHT));
> +	IXGBE_WRITE_FLUSH(hw);
> +	IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD,
> +			(IXGBE_READ_REG(hw, IXGBE_FDIRCMD) &
> +			 ~IXGBE_FDIRCMD_CLEARHT));
> +	IXGBE_WRITE_FLUSH(hw);
> +
>  	fdirctrl = IXGBE_READ_REG(hw, IXGBE_FDIRCTRL);
> 
>  	fdirctrl &= ~IXGBE_FDIRCTRL_FLEX_MASK; @@ -520,6 +541,14 @@
> ixgbe_fdir_set_flexbytes_offset(struct rte_eth_dev *dev,
>  			break;
>  		msec_delay(1);
>  	}
> +
> +	if (i >= IXGBE_FDIR_INIT_DONE_POLL) {
> +		PMD_DRV_LOG(ERR, "Flow Director poll time exceeded!");
> +		return -ETIMEDOUT;
> +	}
> +
> +	fdir_info->flex_bytes_offset = offset;
> +
>  	return 0;
>  }
> 
> diff --git a/drivers/net/ixgbe/ixgbe_flow.c b/drivers/net/ixgbe/ixgbe_flow.c
> index 39f6ed73f..9aeb2e4a4 100644
> --- a/drivers/net/ixgbe/ixgbe_flow.c
> +++ b/drivers/net/ixgbe/ixgbe_flow.c
> @@ -3137,13 +3137,13 @@ ixgbe_flow_create(struct rte_eth_dev *dev,
>  				rte_memcpy(&fdir_info->mask,
>  					&fdir_rule.mask,
>  					sizeof(struct ixgbe_hw_fdir_mask));
> -				fdir_info->flex_bytes_offset =
> -					fdir_rule.flex_bytes_offset;
> 
> -				if (fdir_rule.mask.flex_bytes_mask)
> -					ixgbe_fdir_set_flexbytes_offset(dev,
> +				if (fdir_rule.mask.flex_bytes_mask) {
> +					ret =
> ixgbe_fdir_set_flexbytes_offset(dev,
>  						fdir_rule.flex_bytes_offset);
> -
> +					if (ret)
> +						goto out;
> +				}
>  				ret = ixgbe_fdir_set_input_mask(dev);
>  				if (ret)
>  					goto out;
> @@ -3161,8 +3161,9 @@ ixgbe_flow_create(struct rte_eth_dev *dev,
>  				if (ret)
>  					goto out;
> 
> -				if (fdir_info->flex_bytes_offset !=
> -						fdir_rule.flex_bytes_offset)
> +				if (fdir_rule.mask.flex_bytes_mask &&
> +				    fdir_info->flex_bytes_offset !=
> +				    fdir_rule.flex_bytes_offset)
>  					goto out;
>  			}
>  		}
> --
> 2.26.2.windows.1
Ferruh Yigit Jan. 5, 2021, 12:09 p.m. UTC | #3 
On 12/22/2020 7:23 AM, Guo, Jia wrote:
> Acked-by: Jeff Guo <jia.guo@intel.com>
> 
>> -----Original Message-----
>> From: Zhou, JunX W <junx.w.zhou@intel.com>
>> Sent: Tuesday, December 22, 2020 2:51 PM
>> To: Yu, DapengX <dapengx.yu@intel.com>; Guo, Jia <jia.guo@intel.com>
>> Cc: dev@dpdk.org; Yu, DapengX <dapengx.yu@intel.com>; stable@dpdk.org
>> Subject: RE: [dpdk-dev] [PATCH v2] net/ixgbe: fix fdirctrl register setting
>>
>> Tested-by: Zhou, Jun <junx.w.zhou@intel.com>
>>
>> -----Original Message-----
>> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of
>> dapengx.yu@intel.com
>> Sent: Tuesday, December 15, 2020 6:11 PM
>> To: Guo, Jia <jia.guo@intel.com>
>> Cc: dev@dpdk.org; Yu, DapengX <dapengx.yu@intel.com>; stable@dpdk.org
>> Subject: [dpdk-dev] [PATCH v2] net/ixgbe: fix fdirctrl register setting
>>
>> From: YU DAPENG <dapengx.yu@intel.com>
>>
>> The function ixgbe_fdir_set_flexbytes_offset is used when create FDir rule
>> for flexbytes. It set a register: FDIRCTRL.FLEX_OFFSET, which cause that even
>> if the FDir flexbytes rule is destroyed, the rule still direct the packet and
>> transfer it to the wrong place. It is because setting FDIRCTRL shall only be
>> permitted on Flow Director initialization flow or clearing the Flow Director
>> table according to intel datasheet, otherwise unexpected happens. In order
>> to evade the limit, add code to set FDIRCMD.CLEARHT to 1b and then clear it
>> back to 0b to make the setting act like the Flow Director initialization flow or
>> clearing the Flow Director table.
>>
>> Fixes: f35fec63dde1 ("net/ixgbe: enable flex bytes for generic flow API")
>> Cc: stable@dpdk.org
>>
>> Signed-off-by: YU DAPENG <dapengx.yu@intel.com>

Updating the commit log as following:

     net/ixgbe: fix flexbytes flow director rule

     When a flexbytes flow director rule is created, the FDIRCTRL.FLEX_OFFSET
     register is set, and it keeps its affect even after the flow director
     flexbytes rule is destroyed, causing packets to be transferred to the
     wrong place.

     It is because setting FDIRCTRL shall only be permitted on Flow Director
     initialization flow or clearing the Flow Director table according to the
     datasheet, otherwise device may behave unexpectedly.

     In order to evade this limitation, simulate the Flow Director
     initialization flow or clearing the Flow Director table by setting
     FDIRCMD.CLEARHT to 0x1B and then clear it back to 0x0B.

     Fixes: f35fec63dde1 ("net/ixgbe: enable flex bytes for generic flow API")
     Cc: stable@dpdk.org

     Signed-off-by: Dapeng Yu <dapengx.yu@intel.com>
     Tested-by: Jun Zhou <junx.w.zhou@intel.com>
     Acked-by: Jeff Guo <jia.guo@intel.com>

Please prefer the "Dapeng Yu <dapengx.yu@intel.com>" signature to be consistent.
diff mbox series

Patch

diff --git a/drivers/net/ixgbe/ixgbe_fdir.c b/drivers/net/ixgbe/ixgbe_fdir.c
index a0fab5070..11b9effeb 100644
--- a/drivers/net/ixgbe/ixgbe_fdir.c
+++ b/drivers/net/ixgbe/ixgbe_fdir.c
@@ -503,9 +503,30 @@  ixgbe_fdir_set_flexbytes_offset(struct rte_eth_dev *dev,
 				uint16_t offset)
 {
 	struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+	struct ixgbe_hw_fdir_info *fdir_info =
+		IXGBE_DEV_PRIVATE_TO_FDIR_INFO(dev->data->dev_private);
 	uint32_t fdirctrl;
 	int i;
 
+	if (fdir_info->flex_bytes_offset == offset)
+		return 0;
+
+	/**
+	 * 82599 adapters flow director init flow cannot be restarted,
+	 * Workaround 82599 silicon errata by performing the following steps
+	 * before re-writing the FDIRCTRL control register with the same value.
+	 * - write 1 to bit 8 of FDIRCMD register &
+	 * - write 0 to bit 8 of FDIRCMD register
+	 */
+	IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD,
+			(IXGBE_READ_REG(hw, IXGBE_FDIRCMD) |
+			 IXGBE_FDIRCMD_CLEARHT));
+	IXGBE_WRITE_FLUSH(hw);
+	IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD,
+			(IXGBE_READ_REG(hw, IXGBE_FDIRCMD) &
+			 ~IXGBE_FDIRCMD_CLEARHT));
+	IXGBE_WRITE_FLUSH(hw);
+
 	fdirctrl = IXGBE_READ_REG(hw, IXGBE_FDIRCTRL);
 
 	fdirctrl &= ~IXGBE_FDIRCTRL_FLEX_MASK;
@@ -520,6 +541,14 @@  ixgbe_fdir_set_flexbytes_offset(struct rte_eth_dev *dev,
 			break;
 		msec_delay(1);
 	}
+
+	if (i >= IXGBE_FDIR_INIT_DONE_POLL) {
+		PMD_DRV_LOG(ERR, "Flow Director poll time exceeded!");
+		return -ETIMEDOUT;
+	}
+
+	fdir_info->flex_bytes_offset = offset;
+
 	return 0;
 }
 
diff --git a/drivers/net/ixgbe/ixgbe_flow.c b/drivers/net/ixgbe/ixgbe_flow.c
index 39f6ed73f..9aeb2e4a4 100644
--- a/drivers/net/ixgbe/ixgbe_flow.c
+++ b/drivers/net/ixgbe/ixgbe_flow.c
@@ -3137,13 +3137,13 @@  ixgbe_flow_create(struct rte_eth_dev *dev,
 				rte_memcpy(&fdir_info->mask,
 					&fdir_rule.mask,
 					sizeof(struct ixgbe_hw_fdir_mask));
-				fdir_info->flex_bytes_offset =
-					fdir_rule.flex_bytes_offset;
 
-				if (fdir_rule.mask.flex_bytes_mask)
-					ixgbe_fdir_set_flexbytes_offset(dev,
+				if (fdir_rule.mask.flex_bytes_mask) {
+					ret = ixgbe_fdir_set_flexbytes_offset(dev,
 						fdir_rule.flex_bytes_offset);
-
+					if (ret)
+						goto out;
+				}
 				ret = ixgbe_fdir_set_input_mask(dev);
 				if (ret)
 					goto out;
@@ -3161,8 +3161,9 @@  ixgbe_flow_create(struct rte_eth_dev *dev,
 				if (ret)
 					goto out;
 
-				if (fdir_info->flex_bytes_offset !=
-						fdir_rule.flex_bytes_offset)
+				if (fdir_rule.mask.flex_bytes_mask &&
+				    fdir_info->flex_bytes_offset !=
+				    fdir_rule.flex_bytes_offset)
 					goto out;
 			}
 		}