diff mbox series

[6/6] doc: update GTP extension header support

Message ID 20201228194432.30512-7-shirik@nvidia.com (mailing list archive)
State Superseded, archived
Delegated to: Ferruh Yigit
Headers
Series add GTP PSC extension header support |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-abi-testing success Testing PASS
ci/iol-testing success Testing PASS

Commit Message

Shiri Kuzin Dec. 28, 2020, 7:44 p.m. UTC 
  added GTP extension header support to mlx5 PMD.

The limitations and support were updated in
documentation.

Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
---
 doc/guides/nics/mlx5.rst | 5 +++++
 1 file changed, 5 insertions(+)
diff mbox series

Patch

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 3bda0f8417..3b1a08f40a 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -98,6 +98,7 @@  Features
 - Hardware LRO.
 - Hairpin.
 - Multiple-thread flow insertion.
+- Matching on GTP extension header with raw encap/decap action.
 
 Limitations
 -----------
@@ -186,6 +187,10 @@  Limitations
      - msg_type
      - teid
 
+- Match on GTP extension header only for GTP PDU session container (next
+  extension header type = 0x85).
+- Match on GTP extension header is not supported in group 0.
+
 - No Tx metadata go to the E-Switch steering domain for the Flow group 0.
   The flows within group 0 and set metadata action are rejected by hardware.