diff mbox series

[10/10] compress/mlx5: add the supported capabilities

Message ID 1610373560-253158-11-git-send-email-matan@nvidia.com (mailing list archive)
State Superseded, archived
Delegated to: akhil goyal
Headers
Series add mlx5 compress PMD |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Matan Azrad Jan. 11, 2021, 1:59 p.m. UTC 
  Add all the capabilities supported by the device.

Signed-off-by: Matan Azrad <matan@nvidia.com>
---
 drivers/compress/mlx5/mlx5_compress.c | 24 ++++++++++++++++++++++--
 1 file changed, 22 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/drivers/compress/mlx5/mlx5_compress.c b/drivers/compress/mlx5/mlx5_compress.c
index d768453..7384351 100644
--- a/drivers/compress/mlx5/mlx5_compress.c
+++ b/drivers/compress/mlx5/mlx5_compress.c
@@ -74,8 +74,28 @@  struct mlx5_compress_qp {
 
 int mlx5_compress_logtype;
 
-const struct rte_compressdev_capabilities mlx5_caps[RTE_COMP_ALGO_LIST_END];
-
+static const struct rte_compressdev_capabilities mlx5_caps[] = {
+	{
+		.algo = RTE_COMP_ALGO_NULL,
+		.comp_feature_flags = RTE_COMP_FF_ADLER32_CHECKSUM |
+				      RTE_COMP_FF_CRC32_CHECKSUM |
+				      RTE_COMP_FF_CRC32_ADLER32_CHECKSUM |
+				      RTE_COMP_FF_SHAREABLE_PRIV_XFORM,
+	},
+	{
+		.algo = RTE_COMP_ALGO_DEFLATE,
+		.comp_feature_flags = RTE_COMP_FF_ADLER32_CHECKSUM |
+				      RTE_COMP_FF_CRC32_CHECKSUM |
+				      RTE_COMP_FF_CRC32_ADLER32_CHECKSUM |
+				      RTE_COMP_FF_SHAREABLE_PRIV_XFORM |
+				      RTE_COMP_FF_HUFFMAN_FIXED |
+				      RTE_COMP_FF_HUFFMAN_DYNAMIC,
+		.window_size = {.min = 10, .max = 15, .increment = 1},
+	},
+	{
+		.algo = RTE_COMP_ALGO_LIST_END,
+	}
+};
 
 static void
 mlx5_compress_dev_info_get(struct rte_compressdev *dev,