[v3,31/34] net/mvpp2: support custom header before ethernet

Message ID 20210127160948.6008-32-lironh@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers
Series net/mvpp2: misc updates |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Liron Himi Jan. 27, 2021, 4:09 p.m. UTC
  From: Dana Vardi <danat@marvell.com>

Extend 'start_hdr' options with custom header.

Signed-off-by: Dana Vardi <danat@marvell.com>
Reviewed-by: Liron Himi <lironh@marvell.com>
---
 doc/guides/nics/mvpp2.rst    | 2 +-
 drivers/net/mvpp2/mrvl_qos.c | 5 +++++
 2 files changed, 6 insertions(+), 1 deletion(-)
  

Patch

diff --git a/doc/guides/nics/mvpp2.rst b/doc/guides/nics/mvpp2.rst
index 8400fc9846..8106ef9dcb 100644
--- a/doc/guides/nics/mvpp2.rst
+++ b/doc/guides/nics/mvpp2.rst
@@ -261,7 +261,7 @@  Where:
 
 - ``<portnum>``: DPDK Port number (0..n).
 
-- ``<start_hdr>``: Indicate what is the start header mode (`none` (eth), `dsa`, or `ext_dsa`).
+- ``<start_hdr>``: Indicate what is the start header mode (`none` (eth), `dsa`, `ext_dsa` or `custom`).
 
 - ``<default_tc>``: Default traffic class (e.g. 0)
 
diff --git a/drivers/net/mvpp2/mrvl_qos.c b/drivers/net/mvpp2/mrvl_qos.c
index e420c0cbc5..9fec3c1566 100644
--- a/drivers/net/mvpp2/mrvl_qos.c
+++ b/drivers/net/mvpp2/mrvl_qos.c
@@ -23,6 +23,7 @@ 
 #define MRVL_TOK_START_HDR "start_hdr"
 #define MRVL_TOK_START_HDR_NONE "none"
 #define MRVL_TOK_START_HDR_DSA "dsa"
+#define MRVL_TOK_START_HDR_CUSTOM "custom"
 #define MRVL_TOK_START_HDR_EXT_DSA "ext_dsa"
 #define MRVL_TOK_DEFAULT_TC "default_tc"
 #define MRVL_TOK_DSCP "dscp"
@@ -742,6 +743,10 @@  mrvl_get_cfg(const char *key __rte_unused, const char *path, void *extra_args)
 				sizeof(MRVL_TOK_START_HDR_DSA)))
 				(*cfg)->port[n].eth_start_hdr =
 				PP2_PPIO_HDR_ETH_DSA;
+			else if (!strncmp(entry, MRVL_TOK_START_HDR_CUSTOM,
+				sizeof(MRVL_TOK_START_HDR_CUSTOM)))
+				(*cfg)->port[n].eth_start_hdr =
+				PP2_PPIO_HDR_ETH_CUSTOM;
 			else if (!strncmp(entry, MRVL_TOK_START_HDR_EXT_DSA,
 				sizeof(MRVL_TOK_START_HDR_EXT_DSA))) {
 				(*cfg)->port[n].eth_start_hdr =