diff mbox series

[v2] net/hns3: fix compile error with gcc8.3 and thunderx2

Message ID 1621425281-2413-1-git-send-email-fengchengwen@huawei.com (mailing list archive)
State Not Applicable, archived
Delegated to: Ferruh Yigit
Headers
Series [v2] net/hns3: fix compile error with gcc8.3 and thunderx2 |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation warning apply issues
ci/iol-abi-testing success Testing PASS
ci/iol-testing fail Testing issues
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-mellanox-Functional fail Functional Testing issues
ci/iol-mellanox-Performance fail Performance Testing issues

Commit Message

fengchengwen May 19, 2021, 11:54 a.m. UTC 
  Compile error with gcc8.3 and crossfile arm64_thunderx2_linux_gcc:
	../drivers/net/hns3/hns3_rxtx_vec_sve.c
	cc1: error: switch ‘-mcpu=armv8.1-a’ conflicts with
	‘-march=armv8.2-a’ switch [-Werror]
	../drivers/net/hns3/hns3_rxtx_vec_sve.c:5:10: fatal error:
	arm_sve.h: No such file or directory
	    5 | #include <arm_sve.h>

The root cause is that gcc8.3 supports SVE, but it doesn't support
compile ACLE[1] SVE code, and the hns3_rxtx_vec_sve.c was written
by ACLE SVE code.

This patch also filters out '-march=' '-mcpu' '-mtune' when compile
with hns3_rxtx_vec_sve.c.

[1] ACLE: Arm C Language Extensions, user should include <arm_sve.h>
when writing ACLE SVE code.

Fixes: 203fbaf8813d ("net/hns3: refactor SVE code compile method")

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
---
v2:
* fix check tool error
---
 drivers/net/hns3/meson.build | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

Comments

Ferruh Yigit May 19, 2021, 12:30 p.m. UTC | #1 
On 5/19/2021 12:54 PM, Chengwen Feng wrote:
> Compile error with gcc8.3 and crossfile arm64_thunderx2_linux_gcc:
> 	../drivers/net/hns3/hns3_rxtx_vec_sve.c
> 	cc1: error: switch ‘-mcpu=armv8.1-a’ conflicts with
> 	‘-march=armv8.2-a’ switch [-Werror]
> 	../drivers/net/hns3/hns3_rxtx_vec_sve.c:5:10: fatal error:
> 	arm_sve.h: No such file or directory
> 	    5 | #include <arm_sve.h>
> 
> The root cause is that gcc8.3 supports SVE, but it doesn't support
> compile ACLE[1] SVE code, and the hns3_rxtx_vec_sve.c was written
> by ACLE SVE code.
> 
> This patch also filters out '-march=' '-mcpu' '-mtune' when compile
> with hns3_rxtx_vec_sve.c.
> 
> [1] ACLE: Arm C Language Extensions, user should include <arm_sve.h>
> when writing ACLE SVE code.
> 
> Fixes: 203fbaf8813d ("net/hns3: refactor SVE code compile method")
> 
> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>

Hi Chengwen,

We need CI result to proceed with the patch, since I don't have arm platfrom to
test this properly.

But in the CI applying patch fails, I guess that is because the original patch
has been dropped in the next-net.

Can you please send a new version of the patch rebased on top of latest next-net?
David Marchand May 19, 2021, 12:34 p.m. UTC | #2 
On Wed, May 19, 2021 at 1:57 PM Chengwen Feng <fengchengwen@huawei.com> wrote:
>
> Compile error with gcc8.3 and crossfile arm64_thunderx2_linux_gcc:
>         ../drivers/net/hns3/hns3_rxtx_vec_sve.c
>         cc1: error: switch ‘-mcpu=armv8.1-a’ conflicts with
>         ‘-march=armv8.2-a’ switch [-Werror]
>         ../drivers/net/hns3/hns3_rxtx_vec_sve.c:5:10: fatal error:
>         arm_sve.h: No such file or directory
>             5 | #include <arm_sve.h>
>
> The root cause is that gcc8.3 supports SVE, but it doesn't support
> compile ACLE[1] SVE code, and the hns3_rxtx_vec_sve.c was written
> by ACLE SVE code.

Quite confusing.
What is the difference between the two?


>
> This patch also filters out '-march=' '-mcpu' '-mtune' when compile
> with hns3_rxtx_vec_sve.c.
>
> [1] ACLE: Arm C Language Extensions, user should include <arm_sve.h>
> when writing ACLE SVE code.
>
> Fixes: 203fbaf8813d ("net/hns3: refactor SVE code compile method")
>
> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
> ---
> v2:
> * fix check tool error
> ---
>  drivers/net/hns3/meson.build | 14 ++++++++++----
>  1 file changed, 10 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/net/hns3/meson.build b/drivers/net/hns3/meson.build
> index 8563d70..5f9af9b 100644
> --- a/drivers/net/hns3/meson.build
> +++ b/drivers/net/hns3/meson.build
> @@ -39,16 +39,22 @@ if arch_subdir == 'arm' and dpdk_conf.get('RTE_ARCH_64')
>      # compile SVE when:
>      # a. support SVE in minimum instruction set baseline
>      # b. it's not minimum instruction set, but compiler support
> -    if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != ''
> +    if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != '' and cc.check_header('arm_sve.h')

The rte_vect.h arm header unconditionally includes arm_sve.h if
__ARM_FEATURE_SVE is defined [1].
So it is surprising to see such a check being added.

1: https://git.dpdk.org/dpdk/tree/lib/eal/arm/include/rte_vect.h#n12
David Marchand May 19, 2021, 12:42 p.m. UTC | #3 
On Wed, May 19, 2021 at 2:30 PM Ferruh Yigit <ferruh.yigit@intel.com> wrote:
>
> On 5/19/2021 12:54 PM, Chengwen Feng wrote:
> > Compile error with gcc8.3 and crossfile arm64_thunderx2_linux_gcc:
> >       ../drivers/net/hns3/hns3_rxtx_vec_sve.c
> >       cc1: error: switch ‘-mcpu=armv8.1-a’ conflicts with
> >       ‘-march=armv8.2-a’ switch [-Werror]
> >       ../drivers/net/hns3/hns3_rxtx_vec_sve.c:5:10: fatal error:
> >       arm_sve.h: No such file or directory
> >           5 | #include <arm_sve.h>
> >
> > The root cause is that gcc8.3 supports SVE, but it doesn't support
> > compile ACLE[1] SVE code, and the hns3_rxtx_vec_sve.c was written
> > by ACLE SVE code.
> >
> > This patch also filters out '-march=' '-mcpu' '-mtune' when compile
> > with hns3_rxtx_vec_sve.c.
> >
> > [1] ACLE: Arm C Language Extensions, user should include <arm_sve.h>
> > when writing ACLE SVE code.
> >
> > Fixes: 203fbaf8813d ("net/hns3: refactor SVE code compile method")
> >
> > Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
>
> Hi Chengwen,
>
> We need CI result to proceed with the patch, since I don't have arm platfrom to
> test this properly.
>
> But in the CI applying patch fails, I guess that is because the original patch
> has been dropped in the next-net.
>
> Can you please send a new version of the patch rebased on top of latest next-net?

We are almost done for 21.05.
Is this issue a blocker?
fengchengwen May 19, 2021, 1:30 p.m. UTC | #4 
Thanks a lot, Ferruh
Already rebase and send v6, please review 2/2 patch.


On 2021/5/19 20:30, Ferruh Yigit wrote:
> On 5/19/2021 12:54 PM, Chengwen Feng wrote:
>> Compile error with gcc8.3 and crossfile arm64_thunderx2_linux_gcc:
>> 	../drivers/net/hns3/hns3_rxtx_vec_sve.c
>> 	cc1: error: switch ‘-mcpu=armv8.1-a’ conflicts with
>> 	‘-march=armv8.2-a’ switch [-Werror]
>> 	../drivers/net/hns3/hns3_rxtx_vec_sve.c:5:10: fatal error:
>> 	arm_sve.h: No such file or directory
>> 	    5 | #include <arm_sve.h>
>>
>> The root cause is that gcc8.3 supports SVE, but it doesn't support
>> compile ACLE[1] SVE code, and the hns3_rxtx_vec_sve.c was written
>> by ACLE SVE code.
>>
>> This patch also filters out '-march=' '-mcpu' '-mtune' when compile
>> with hns3_rxtx_vec_sve.c.
>>
>> [1] ACLE: Arm C Language Extensions, user should include <arm_sve.h>
>> when writing ACLE SVE code.
>>
>> Fixes: 203fbaf8813d ("net/hns3: refactor SVE code compile method")
>>
>> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
> 
> Hi Chengwen,
> 
> We need CI result to proceed with the patch, since I don't have arm platfrom to
> test this properly.
> 
> But in the CI applying patch fails, I guess that is because the original patch
> has been dropped in the next-net.
> 
> Can you please send a new version of the patch rebased on top of latest next-net?
> 
> .
>
fengchengwen May 19, 2021, 1:40 p.m. UTC | #5 
On 2021/5/19 20:34, David Marchand wrote:
> On Wed, May 19, 2021 at 1:57 PM Chengwen Feng <fengchengwen@huawei.com> wrote:
>>
>> Compile error with gcc8.3 and crossfile arm64_thunderx2_linux_gcc:
>>         ../drivers/net/hns3/hns3_rxtx_vec_sve.c
>>         cc1: error: switch ‘-mcpu=armv8.1-a’ conflicts with
>>         ‘-march=armv8.2-a’ switch [-Werror]
>>         ../drivers/net/hns3/hns3_rxtx_vec_sve.c:5:10: fatal error:
>>         arm_sve.h: No such file or directory
>>             5 | #include <arm_sve.h>
>>
>> The root cause is that gcc8.3 supports SVE, but it doesn't support
>> compile ACLE[1] SVE code, and the hns3_rxtx_vec_sve.c was written
>> by ACLE SVE code.
> 
> Quite confusing.
> What is the difference between the two?
> 

Only SVE assembly instructions are supported in gcc8/9

And the ACLE SVE code like normal C code.
There are also ACLE NEON code which many driver already supports.

> 
>>
>> This patch also filters out '-march=' '-mcpu' '-mtune' when compile
>> with hns3_rxtx_vec_sve.c.
>>
>> [1] ACLE: Arm C Language Extensions, user should include <arm_sve.h>
>> when writing ACLE SVE code.
>>
>> Fixes: 203fbaf8813d ("net/hns3: refactor SVE code compile method")
>>
>> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
>> ---
>> v2:
>> * fix check tool error
>> ---
>>  drivers/net/hns3/meson.build | 14 ++++++++++----
>>  1 file changed, 10 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/net/hns3/meson.build b/drivers/net/hns3/meson.build
>> index 8563d70..5f9af9b 100644
>> --- a/drivers/net/hns3/meson.build
>> +++ b/drivers/net/hns3/meson.build
>> @@ -39,16 +39,22 @@ if arch_subdir == 'arm' and dpdk_conf.get('RTE_ARCH_64')
>>      # compile SVE when:
>>      # a. support SVE in minimum instruction set baseline
>>      # b. it's not minimum instruction set, but compiler support
>> -    if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != ''
>> +    if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != '' and cc.check_header('arm_sve.h')
> 
> The rte_vect.h arm header unconditionally includes arm_sve.h if
> __ARM_FEATURE_SVE is defined [1].
> So it is surprising to see such a check being added.
> 
> 1: https://git.dpdk.org/dpdk/tree/lib/eal/arm/include/rte_vect.h#n12
> 

Yes, it is, I will fix in 21.08

>
diff mbox series

Patch

diff --git a/drivers/net/hns3/meson.build b/drivers/net/hns3/meson.build
index 8563d70..5f9af9b 100644
--- a/drivers/net/hns3/meson.build
+++ b/drivers/net/hns3/meson.build
@@ -39,16 +39,22 @@  if arch_subdir == 'arm' and dpdk_conf.get('RTE_ARCH_64')
     # compile SVE when:
     # a. support SVE in minimum instruction set baseline
     # b. it's not minimum instruction set, but compiler support
-    if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != ''
+    if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != '' and cc.check_header('arm_sve.h')
         cflags += ['-DCC_SVE_SUPPORT']
         sources += files('hns3_rxtx_vec_sve.c')
-    elif cc.has_argument('-march=armv8.2-a+sve')
-        cflags += ['-DCC_SVE_SUPPORT']
+    elif cc.has_argument('-march=armv8.2-a+sve') and cc.check_header('arm_sve.h')
+        sve_cflags = ['-DCC_SVE_SUPPORT']
+        foreach flag: cflags
+            # filterout -march -mcpu -mtune
+            if not (flag.startswith('-march=') or flag.startswith('-mcpu=') or flag.startswith('-mtune='))
+                sve_cflags += flag
+            endif
+        endforeach
         hns3_sve_lib = static_library('hns3_sve_lib',
                         'hns3_rxtx_vec_sve.c',
                         dependencies: [static_rte_ethdev],
                         include_directories: includes,
-                        c_args: [cflags, '-march=armv8.2-a+sve'])
+                        c_args: [sve_cflags, '-march=armv8.2-a+sve'])
         objs += hns3_sve_lib.extract_objects('hns3_rxtx_vec_sve.c')
     endif
 endif