[v6,2/3] net/iavf: enable PCI bus master after reset
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Commit Message
The VF reset can be triggerred by the PF reset event, in this case, the
PCI bus master will be cleared, then the VF is not allowed to issue any
Memory or I/O Requests.
So after the reset event is detected, always enable the PCI bus master.
And if failed, the device or system may be in an invalid state, so keep
the VF reset state to mark it as I/O error.
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
---
drivers/net/iavf/iavf_ethdev.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
@@ -2356,7 +2356,15 @@ iavf_dev_close(struct rte_eth_dev *dev)
rte_free(vf->aq_resp);
vf->aq_resp = NULL;
- vf->vf_reset = false;
+ /*
+ * If the VF is reset via VFLR, the device will be knocked out of bus
+ * master mode, and the driver will fail to recover from the reset. Fix
+ * this by enabling bus mastering after every reset. In a non-VFLR case,
+ * the bus master bit will not be disabled, and this call will have no
+ * effect.
+ */
+ if (vf->vf_reset && !rte_pci_set_bus_master(pci_dev, true))
+ vf->vf_reset = false;
return ret;
}