[v5,04/24] net/ngbe: add device init and uninit
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Commit Message
Add basic init and uninit function.
Map device IDs and subsystem IDs to single ID for easy operation.
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
drivers/net/ngbe/base/meson.build | 4 +-
drivers/net/ngbe/base/ngbe.h | 11 ++
drivers/net/ngbe/base/ngbe_hw.c | 60 ++++++++++
drivers/net/ngbe/base/ngbe_hw.h | 13 +++
drivers/net/ngbe/base/ngbe_osdep.h | 175 +++++++++++++++++++++++++++++
drivers/net/ngbe/base/ngbe_type.h | 28 +++++
drivers/net/ngbe/ngbe_ethdev.c | 36 +++++-
drivers/net/ngbe/ngbe_ethdev.h | 7 ++
8 files changed, 331 insertions(+), 3 deletions(-)
create mode 100644 drivers/net/ngbe/base/ngbe.h
create mode 100644 drivers/net/ngbe/base/ngbe_hw.c
create mode 100644 drivers/net/ngbe/base/ngbe_hw.h
create mode 100644 drivers/net/ngbe/base/ngbe_osdep.h
create mode 100644 drivers/net/ngbe/base/ngbe_type.h
Comments
On 6/2/21 12:40 PM, Jiawen Wu wrote:
> Add basic init and uninit function.
> Map device IDs and subsystem IDs to single ID for easy operation.
>
> Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
> ---
> drivers/net/ngbe/base/meson.build | 4 +-
> drivers/net/ngbe/base/ngbe.h | 11 ++
> drivers/net/ngbe/base/ngbe_hw.c | 60 ++++++++++
> drivers/net/ngbe/base/ngbe_hw.h | 13 +++
> drivers/net/ngbe/base/ngbe_osdep.h | 175 +++++++++++++++++++++++++++++
> drivers/net/ngbe/base/ngbe_type.h | 28 +++++
> drivers/net/ngbe/ngbe_ethdev.c | 36 +++++-
> drivers/net/ngbe/ngbe_ethdev.h | 7 ++
> 8 files changed, 331 insertions(+), 3 deletions(-)
> create mode 100644 drivers/net/ngbe/base/ngbe.h
> create mode 100644 drivers/net/ngbe/base/ngbe_hw.c
> create mode 100644 drivers/net/ngbe/base/ngbe_hw.h
> create mode 100644 drivers/net/ngbe/base/ngbe_osdep.h
> create mode 100644 drivers/net/ngbe/base/ngbe_type.h
>
> diff --git a/drivers/net/ngbe/base/meson.build b/drivers/net/ngbe/base/meson.build
> index c5f6467743..fdbfa99916 100644
> --- a/drivers/net/ngbe/base/meson.build
> +++ b/drivers/net/ngbe/base/meson.build
> @@ -1,7 +1,9 @@
> # SPDX-License-Identifier: BSD-3-Clause
> # Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
>
> -sources = []
> +sources = [
> + 'ngbe_hw.c',
> +]
>
> error_cflags = []
>
> diff --git a/drivers/net/ngbe/base/ngbe.h b/drivers/net/ngbe/base/ngbe.h
> new file mode 100644
> index 0000000000..63fad12ad3
> --- /dev/null
> +++ b/drivers/net/ngbe/base/ngbe.h
> @@ -0,0 +1,11 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
> + */
> +
> +#ifndef _NGBE_H_
> +#define _NGBE_H_
> +
> +#include "ngbe_type.h"
> +#include "ngbe_hw.h"
> +
> +#endif /* _NGBE_H_ */
> diff --git a/drivers/net/ngbe/base/ngbe_hw.c b/drivers/net/ngbe/base/ngbe_hw.c
> new file mode 100644
> index 0000000000..0fab47f272
> --- /dev/null
> +++ b/drivers/net/ngbe/base/ngbe_hw.c
> @@ -0,0 +1,60 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
> + * Copyright(c) 2010-2017 Intel Corporation
> + */
> +
> +#include "ngbe_hw.h"
> +
> +void ngbe_map_device_id(struct ngbe_hw *hw)
> +{
> + u16 oem = hw->sub_system_id & NGBE_OEM_MASK;
> + u16 internal = hw->sub_system_id & NGBE_INTERNAL_MASK;
> + hw->is_pf = true;
> +
> + /* move subsystem_device_id to device_id */
> + switch (hw->device_id) {
> + case NGBE_DEV_ID_EM_WX1860AL_W_VF:
> + case NGBE_DEV_ID_EM_WX1860A2_VF:
> + case NGBE_DEV_ID_EM_WX1860A2S_VF:
> + case NGBE_DEV_ID_EM_WX1860A4_VF:
> + case NGBE_DEV_ID_EM_WX1860A4S_VF:
> + case NGBE_DEV_ID_EM_WX1860AL2_VF:
> + case NGBE_DEV_ID_EM_WX1860AL2S_VF:
> + case NGBE_DEV_ID_EM_WX1860AL4_VF:
> + case NGBE_DEV_ID_EM_WX1860AL4S_VF:
> + case NGBE_DEV_ID_EM_WX1860NCSI_VF:
> + case NGBE_DEV_ID_EM_WX1860A1_VF:
> + case NGBE_DEV_ID_EM_WX1860A1L_VF:
> + hw->device_id = NGBE_DEV_ID_EM_VF;
> + hw->sub_device_id = NGBE_SUB_DEV_ID_EM_VF;
> + hw->is_pf = false;
> + break;
> + case NGBE_DEV_ID_EM_WX1860AL_W:
> + case NGBE_DEV_ID_EM_WX1860A2:
> + case NGBE_DEV_ID_EM_WX1860A2S:
> + case NGBE_DEV_ID_EM_WX1860A4:
> + case NGBE_DEV_ID_EM_WX1860A4S:
> + case NGBE_DEV_ID_EM_WX1860AL2:
> + case NGBE_DEV_ID_EM_WX1860AL2S:
> + case NGBE_DEV_ID_EM_WX1860AL4:
> + case NGBE_DEV_ID_EM_WX1860AL4S:
> + case NGBE_DEV_ID_EM_WX1860NCSI:
> + case NGBE_DEV_ID_EM_WX1860A1:
> + case NGBE_DEV_ID_EM_WX1860A1L:
> + hw->device_id = NGBE_DEV_ID_EM;
> + if (oem == NGBE_LY_M88E1512_SFP ||
> + internal == NGBE_INTERNAL_SFP)
> + hw->sub_device_id = NGBE_SUB_DEV_ID_EM_MVL_SFP;
> + else if (hw->sub_system_id == NGBE_SUB_DEV_ID_EM_M88E1512_RJ45)
> + hw->sub_device_id = NGBE_SUB_DEV_ID_EM_MVL_RGMII;
> + else if (oem == NGBE_YT8521S_SFP ||
> + oem == NGBE_LY_YT8521S_SFP)
> + hw->sub_device_id = NGBE_SUB_DEV_ID_EM_YT8521S_SFP;
> + else
> + hw->sub_device_id = NGBE_SUB_DEV_ID_EM_RTL_SGMII;
> + break;
> + default:
> + break;
> + }
> +}
> +
> diff --git a/drivers/net/ngbe/base/ngbe_hw.h b/drivers/net/ngbe/base/ngbe_hw.h
> new file mode 100644
> index 0000000000..b320d126ec
> --- /dev/null
> +++ b/drivers/net/ngbe/base/ngbe_hw.h
> @@ -0,0 +1,13 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
> + * Copyright(c) 2010-2017 Intel Corporation
> + */
> +
> +#ifndef _NGBE_HW_H_
> +#define _NGBE_HW_H_
> +
> +#include "ngbe_type.h"
> +
> +void ngbe_map_device_id(struct ngbe_hw *hw);
> +
> +#endif /* _NGBE_HW_H_ */
> diff --git a/drivers/net/ngbe/base/ngbe_osdep.h b/drivers/net/ngbe/base/ngbe_osdep.h
> new file mode 100644
> index 0000000000..ef3d3d9180
> --- /dev/null
> +++ b/drivers/net/ngbe/base/ngbe_osdep.h
> @@ -0,0 +1,175 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
> + * Copyright(c) 2010-2017 Intel Corporation
> + */
> +
> +#ifndef _NGBE_OS_H_
> +#define _NGBE_OS_H_
> +
> +#include <string.h>
> +#include <stdint.h>
> +#include <stdio.h>
> +#include <stdarg.h>
> +#include <rte_version.h>
> +#include <rte_common.h>
> +#include <rte_debug.h>
> +#include <rte_cycles.h>
> +#include <rte_log.h>
> +#include <rte_byteorder.h>
> +#include <rte_config.h>
> +#include <rte_io.h>
> +
> +#define RTE_LIBRTE_NGBE_TM DCPV(1, 0)
> +#define TMZ_PADDR(mz) ((mz)->iova)
> +#define TMZ_VADDR(mz) ((mz)->addr)
> +#define TDEV_NAME(eth_dev) ((eth_dev)->device->name)
> +
> +#define ngbe_unused __rte_unused
> +
> +#define usec_delay(x) rte_delay_us(x)
> +#define msec_delay(x) rte_delay_ms(x)
> +#define usleep(x) rte_delay_us(x)
> +#define msleep(x) rte_delay_ms(x)
> +
> +#define FALSE 0
> +#define TRUE 1
> +
> +#ifndef false
> +#define false 0
> +#endif
> +#ifndef true
> +#define true 1
> +#endif
> +#define min(a, b) RTE_MIN(a, b)
> +#define max(a, b) RTE_MAX(a, b)
> +
> +/* Bunch of defines for shared code bogosity */
> +
> +static inline void UNREFERENCED(const char *a __rte_unused, ...) {}
> +#define UNREFERENCED_PARAMETER(args...) UNREFERENCED("", ##args)
> +
> +#define STATIC static
> +
> +typedef uint8_t u8;
> +typedef int8_t s8;
> +typedef uint16_t u16;
> +typedef int16_t s16;
> +typedef uint32_t u32;
> +typedef int32_t s32;
> +typedef uint64_t u64;
> +typedef int64_t s64;
> +
> +/* Little Endian defines */
> +#ifndef __le16
> +#define __le16 u16
> +#define __le32 u32
> +#define __le64 u64
> +#endif
> +#ifndef __be16
> +#define __be16 u16
> +#define __be32 u32
> +#define __be64 u64
> +#endif
> +
> +/* Bit shift and mask */
> +#define BIT_MASK4 (0x0000000FU)
> +#define BIT_MASK8 (0x000000FFU)
> +#define BIT_MASK16 (0x0000FFFFU)
> +#define BIT_MASK32 (0xFFFFFFFFU)
> +#define BIT_MASK64 (0xFFFFFFFFFFFFFFFFUL)
> +
> +#ifndef cpu_to_le32
> +#define cpu_to_le16(v) rte_cpu_to_le_16((u16)(v))
> +#define cpu_to_le32(v) rte_cpu_to_le_32((u32)(v))
> +#define cpu_to_le64(v) rte_cpu_to_le_64((u64)(v))
> +#define le_to_cpu16(v) rte_le_to_cpu_16((u16)(v))
> +#define le_to_cpu32(v) rte_le_to_cpu_32((u32)(v))
> +#define le_to_cpu64(v) rte_le_to_cpu_64((u64)(v))
> +
> +#define cpu_to_be16(v) rte_cpu_to_be_16((u16)(v))
> +#define cpu_to_be32(v) rte_cpu_to_be_32((u32)(v))
> +#define cpu_to_be64(v) rte_cpu_to_be_64((u64)(v))
> +#define be_to_cpu16(v) rte_be_to_cpu_16((u16)(v))
> +#define be_to_cpu32(v) rte_be_to_cpu_32((u32)(v))
> +#define be_to_cpu64(v) rte_be_to_cpu_64((u64)(v))
> +
> +#define le_to_be16(v) rte_bswap16((u16)(v))
> +#define le_to_be32(v) rte_bswap32((u32)(v))
> +#define le_to_be64(v) rte_bswap64((u64)(v))
> +#define be_to_le16(v) rte_bswap16((u16)(v))
> +#define be_to_le32(v) rte_bswap32((u32)(v))
> +#define be_to_le64(v) rte_bswap64((u64)(v))
> +
> +#define npu_to_le16(v) (v)
> +#define npu_to_le32(v) (v)
> +#define npu_to_le64(v) (v)
> +#define le_to_npu16(v) (v)
> +#define le_to_npu32(v) (v)
> +#define le_to_npu64(v) (v)
> +
> +#define npu_to_be16(v) le_to_be16((u16)(v))
> +#define npu_to_be32(v) le_to_be32((u32)(v))
> +#define npu_to_be64(v) le_to_be64((u64)(v))
> +#define be_to_npu16(v) be_to_le16((u16)(v))
> +#define be_to_npu32(v) be_to_le32((u32)(v))
> +#define be_to_npu64(v) be_to_le64((u64)(v))
> +#endif /* !cpu_to_le32 */
> +
> +static inline u16 REVERT_BIT_MASK16(u16 mask)
> +{
> + mask = ((mask & 0x5555) << 1) | ((mask & 0xAAAA) >> 1);
> + mask = ((mask & 0x3333) << 2) | ((mask & 0xCCCC) >> 2);
> + mask = ((mask & 0x0F0F) << 4) | ((mask & 0xF0F0) >> 4);
> + return ((mask & 0x00FF) << 8) | ((mask & 0xFF00) >> 8);
> +}
> +
> +static inline u32 REVERT_BIT_MASK32(u32 mask)
> +{
> + mask = ((mask & 0x55555555) << 1) | ((mask & 0xAAAAAAAA) >> 1);
> + mask = ((mask & 0x33333333) << 2) | ((mask & 0xCCCCCCCC) >> 2);
> + mask = ((mask & 0x0F0F0F0F) << 4) | ((mask & 0xF0F0F0F0) >> 4);
> + mask = ((mask & 0x00FF00FF) << 8) | ((mask & 0xFF00FF00) >> 8);
> + return ((mask & 0x0000FFFF) << 16) | ((mask & 0xFFFF0000) >> 16);
> +}
> +
> +static inline u64 REVERT_BIT_MASK64(u64 mask)
> +{
> + mask = ((mask & 0x5555555555555555) << 1) |
> + ((mask & 0xAAAAAAAAAAAAAAAA) >> 1);
> + mask = ((mask & 0x3333333333333333) << 2) |
> + ((mask & 0xCCCCCCCCCCCCCCCC) >> 2);
> + mask = ((mask & 0x0F0F0F0F0F0F0F0F) << 4) |
> + ((mask & 0xF0F0F0F0F0F0F0F0) >> 4);
> + mask = ((mask & 0x00FF00FF00FF00FF) << 8) |
> + ((mask & 0xFF00FF00FF00FF00) >> 8);
> + mask = ((mask & 0x0000FFFF0000FFFF) << 16) |
> + ((mask & 0xFFFF0000FFFF0000) >> 16);
> + return ((mask & 0x00000000FFFFFFFF) << 32) |
> + ((mask & 0xFFFFFFFF00000000) >> 32);
> +}
> +
> +#define IOMEM
> +
> +#define prefetch(x) rte_prefetch0(x)
> +
> +#define ARRAY_SIZE(x) ((int32_t)RTE_DIM(x))
> +
> +#ifndef MAX_UDELAY_MS
> +#define MAX_UDELAY_MS 5
> +#endif
> +
> +#define ETH_ADDR_LEN 6
> +#define ETH_FCS_LEN 4
> +
> +/* Check whether address is multicast. This is little-endian specific check.*/
> +#define NGBE_IS_MULTICAST(address) \
> + rte_is_multicast_ether_addr(address)
> +
> +/* Check whether an address is broadcast. */
> +#define NGBE_IS_BROADCAST(address) \
> + rte_is_broadcast_ether_addr(address)
> +
> +#define ETH_P_8021Q 0x8100
> +#define ETH_P_8021AD 0x88A8
> +
> +#endif /* _NGBE_OS_H_ */
> diff --git a/drivers/net/ngbe/base/ngbe_type.h b/drivers/net/ngbe/base/ngbe_type.h
> new file mode 100644
> index 0000000000..b6bde11dcd
> --- /dev/null
> +++ b/drivers/net/ngbe/base/ngbe_type.h
> @@ -0,0 +1,28 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
> + * Copyright(c) 2010-2017 Intel Corporation
> + */
> +
> +#ifndef _NGBE_TYPE_H_
> +#define _NGBE_TYPE_H_
> +
> +#define NGBE_ALIGN 128 /* as intel did */
> +
> +#include "ngbe_osdep.h"
> +#include "ngbe_devids.h"
> +
> +struct ngbe_hw {
> + void IOMEM *hw_addr;
> + u16 device_id;
> + u16 vendor_id;
> + u16 sub_device_id;
> + u16 sub_system_id;
> + bool allow_unsupported_sfp;
> +
> + uint64_t isb_dma;
> + void IOMEM *isb_mem;
> +
> + bool is_pf;
> +};
> +
> +#endif /* _NGBE_TYPE_H_ */
> diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
> index 83af1a6bc7..3431a9a9a7 100644
> --- a/drivers/net/ngbe/ngbe_ethdev.c
> +++ b/drivers/net/ngbe/ngbe_ethdev.c
> @@ -6,9 +6,11 @@
> #include <rte_common.h>
> #include <ethdev_pci.h>
>
> -#include <base/ngbe_devids.h>
> +#include "base/ngbe.h"
> #include "ngbe_ethdev.h"
>
> +static int ngbe_dev_close(struct rte_eth_dev *dev);
> +
> /*
> * The set of PCI devices this driver supports
> */
> @@ -32,12 +34,31 @@ static int
> eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)
> {
> struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
> + struct ngbe_hw *hw = NGBE_DEV_HW(eth_dev);
> + const struct rte_memzone *mz;
>
> if (rte_eal_process_type() != RTE_PROC_PRIMARY)
> return 0;
>
> rte_eth_copy_pci_info(eth_dev, pci_dev);
>
> + /* Vendor and Device ID need to be set before init of shared code */
> + hw->device_id = pci_dev->id.device_id;
> + hw->vendor_id = pci_dev->id.vendor_id;
> + hw->sub_system_id = pci_dev->id.subsystem_device_id;
> + ngbe_map_device_id(hw);
> + hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
> + hw->allow_unsupported_sfp = 1;
Above line is absolute unclear in the patch. Why?
Does the driver already supports something?
> +
> + /* Reserve memory for interrupt status block */
> + mz = rte_eth_dma_zone_reserve(eth_dev, "ngbe_driver", -1,
> + 16, NGBE_ALIGN, SOCKET_ID_ANY);
Why 16? What is 16? Please, add define or use existing define from base
driver.
> + if (mz == NULL)
> + return -ENOMEM;
> +
> + hw->isb_dma = TMZ_PADDR(mz);
> + hw->isb_mem = TMZ_VADDR(mz);
> +
> return 0;
> }
>
> @@ -47,7 +68,7 @@ eth_ngbe_dev_uninit(struct rte_eth_dev *eth_dev)
> if (rte_eal_process_type() != RTE_PROC_PRIMARY)
> return 0;
>
> - RTE_SET_USED(eth_dev);
> + ngbe_dev_close(eth_dev);
>
> return 0;
> }
> @@ -88,6 +109,17 @@ static struct rte_pci_driver rte_ngbe_pmd = {
> .remove = eth_ngbe_pci_remove,
> };
>
> +/*
> + * Reset and stop device.
> + */
> +static int
> +ngbe_dev_close(struct rte_eth_dev *dev)
> +{
> + RTE_SET_USED(dev);
> +
> + return 0;
> +}
> +
> RTE_PMD_REGISTER_PCI(net_ngbe, rte_ngbe_pmd);
> RTE_PMD_REGISTER_PCI_TABLE(net_ngbe, pci_id_ngbe_map);
> RTE_PMD_REGISTER_KMOD_DEP(net_ngbe, "* igb_uio | uio_pci_generic | vfio-pci");
> diff --git a/drivers/net/ngbe/ngbe_ethdev.h b/drivers/net/ngbe/ngbe_ethdev.h
> index b79570dc51..f6cee4a4a9 100644
> --- a/drivers/net/ngbe/ngbe_ethdev.h
> +++ b/drivers/net/ngbe/ngbe_ethdev.h
> @@ -10,6 +10,13 @@
> * Structure to store private data for each driver instance (for each port).
> */
> struct ngbe_adapter {
> + struct ngbe_hw hw;
> };
>
> +#define NGBE_DEV_ADAPTER(dev) \
> + ((struct ngbe_adapter *)(dev)->data->dev_private)
> +
> +#define NGBE_DEV_HW(dev) \
> + (&((struct ngbe_adapter *)(dev)->data->dev_private)->hw)
> +
Above two macros should be static inline functions to
be type-safe for input dev argument. These static
functions will allow to add extra checks if required
in the future.
> #endif /* _NGBE_ETHDEV_H_ */
>
@@ -1,7 +1,9 @@
# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
-sources = []
+sources = [
+ 'ngbe_hw.c',
+]
error_cflags = []
new file mode 100644
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
+ */
+
+#ifndef _NGBE_H_
+#define _NGBE_H_
+
+#include "ngbe_type.h"
+#include "ngbe_hw.h"
+
+#endif /* _NGBE_H_ */
new file mode 100644
@@ -0,0 +1,60 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
+ * Copyright(c) 2010-2017 Intel Corporation
+ */
+
+#include "ngbe_hw.h"
+
+void ngbe_map_device_id(struct ngbe_hw *hw)
+{
+ u16 oem = hw->sub_system_id & NGBE_OEM_MASK;
+ u16 internal = hw->sub_system_id & NGBE_INTERNAL_MASK;
+ hw->is_pf = true;
+
+ /* move subsystem_device_id to device_id */
+ switch (hw->device_id) {
+ case NGBE_DEV_ID_EM_WX1860AL_W_VF:
+ case NGBE_DEV_ID_EM_WX1860A2_VF:
+ case NGBE_DEV_ID_EM_WX1860A2S_VF:
+ case NGBE_DEV_ID_EM_WX1860A4_VF:
+ case NGBE_DEV_ID_EM_WX1860A4S_VF:
+ case NGBE_DEV_ID_EM_WX1860AL2_VF:
+ case NGBE_DEV_ID_EM_WX1860AL2S_VF:
+ case NGBE_DEV_ID_EM_WX1860AL4_VF:
+ case NGBE_DEV_ID_EM_WX1860AL4S_VF:
+ case NGBE_DEV_ID_EM_WX1860NCSI_VF:
+ case NGBE_DEV_ID_EM_WX1860A1_VF:
+ case NGBE_DEV_ID_EM_WX1860A1L_VF:
+ hw->device_id = NGBE_DEV_ID_EM_VF;
+ hw->sub_device_id = NGBE_SUB_DEV_ID_EM_VF;
+ hw->is_pf = false;
+ break;
+ case NGBE_DEV_ID_EM_WX1860AL_W:
+ case NGBE_DEV_ID_EM_WX1860A2:
+ case NGBE_DEV_ID_EM_WX1860A2S:
+ case NGBE_DEV_ID_EM_WX1860A4:
+ case NGBE_DEV_ID_EM_WX1860A4S:
+ case NGBE_DEV_ID_EM_WX1860AL2:
+ case NGBE_DEV_ID_EM_WX1860AL2S:
+ case NGBE_DEV_ID_EM_WX1860AL4:
+ case NGBE_DEV_ID_EM_WX1860AL4S:
+ case NGBE_DEV_ID_EM_WX1860NCSI:
+ case NGBE_DEV_ID_EM_WX1860A1:
+ case NGBE_DEV_ID_EM_WX1860A1L:
+ hw->device_id = NGBE_DEV_ID_EM;
+ if (oem == NGBE_LY_M88E1512_SFP ||
+ internal == NGBE_INTERNAL_SFP)
+ hw->sub_device_id = NGBE_SUB_DEV_ID_EM_MVL_SFP;
+ else if (hw->sub_system_id == NGBE_SUB_DEV_ID_EM_M88E1512_RJ45)
+ hw->sub_device_id = NGBE_SUB_DEV_ID_EM_MVL_RGMII;
+ else if (oem == NGBE_YT8521S_SFP ||
+ oem == NGBE_LY_YT8521S_SFP)
+ hw->sub_device_id = NGBE_SUB_DEV_ID_EM_YT8521S_SFP;
+ else
+ hw->sub_device_id = NGBE_SUB_DEV_ID_EM_RTL_SGMII;
+ break;
+ default:
+ break;
+ }
+}
+
new file mode 100644
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
+ * Copyright(c) 2010-2017 Intel Corporation
+ */
+
+#ifndef _NGBE_HW_H_
+#define _NGBE_HW_H_
+
+#include "ngbe_type.h"
+
+void ngbe_map_device_id(struct ngbe_hw *hw);
+
+#endif /* _NGBE_HW_H_ */
new file mode 100644
@@ -0,0 +1,175 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
+ * Copyright(c) 2010-2017 Intel Corporation
+ */
+
+#ifndef _NGBE_OS_H_
+#define _NGBE_OS_H_
+
+#include <string.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdarg.h>
+#include <rte_version.h>
+#include <rte_common.h>
+#include <rte_debug.h>
+#include <rte_cycles.h>
+#include <rte_log.h>
+#include <rte_byteorder.h>
+#include <rte_config.h>
+#include <rte_io.h>
+
+#define RTE_LIBRTE_NGBE_TM DCPV(1, 0)
+#define TMZ_PADDR(mz) ((mz)->iova)
+#define TMZ_VADDR(mz) ((mz)->addr)
+#define TDEV_NAME(eth_dev) ((eth_dev)->device->name)
+
+#define ngbe_unused __rte_unused
+
+#define usec_delay(x) rte_delay_us(x)
+#define msec_delay(x) rte_delay_ms(x)
+#define usleep(x) rte_delay_us(x)
+#define msleep(x) rte_delay_ms(x)
+
+#define FALSE 0
+#define TRUE 1
+
+#ifndef false
+#define false 0
+#endif
+#ifndef true
+#define true 1
+#endif
+#define min(a, b) RTE_MIN(a, b)
+#define max(a, b) RTE_MAX(a, b)
+
+/* Bunch of defines for shared code bogosity */
+
+static inline void UNREFERENCED(const char *a __rte_unused, ...) {}
+#define UNREFERENCED_PARAMETER(args...) UNREFERENCED("", ##args)
+
+#define STATIC static
+
+typedef uint8_t u8;
+typedef int8_t s8;
+typedef uint16_t u16;
+typedef int16_t s16;
+typedef uint32_t u32;
+typedef int32_t s32;
+typedef uint64_t u64;
+typedef int64_t s64;
+
+/* Little Endian defines */
+#ifndef __le16
+#define __le16 u16
+#define __le32 u32
+#define __le64 u64
+#endif
+#ifndef __be16
+#define __be16 u16
+#define __be32 u32
+#define __be64 u64
+#endif
+
+/* Bit shift and mask */
+#define BIT_MASK4 (0x0000000FU)
+#define BIT_MASK8 (0x000000FFU)
+#define BIT_MASK16 (0x0000FFFFU)
+#define BIT_MASK32 (0xFFFFFFFFU)
+#define BIT_MASK64 (0xFFFFFFFFFFFFFFFFUL)
+
+#ifndef cpu_to_le32
+#define cpu_to_le16(v) rte_cpu_to_le_16((u16)(v))
+#define cpu_to_le32(v) rte_cpu_to_le_32((u32)(v))
+#define cpu_to_le64(v) rte_cpu_to_le_64((u64)(v))
+#define le_to_cpu16(v) rte_le_to_cpu_16((u16)(v))
+#define le_to_cpu32(v) rte_le_to_cpu_32((u32)(v))
+#define le_to_cpu64(v) rte_le_to_cpu_64((u64)(v))
+
+#define cpu_to_be16(v) rte_cpu_to_be_16((u16)(v))
+#define cpu_to_be32(v) rte_cpu_to_be_32((u32)(v))
+#define cpu_to_be64(v) rte_cpu_to_be_64((u64)(v))
+#define be_to_cpu16(v) rte_be_to_cpu_16((u16)(v))
+#define be_to_cpu32(v) rte_be_to_cpu_32((u32)(v))
+#define be_to_cpu64(v) rte_be_to_cpu_64((u64)(v))
+
+#define le_to_be16(v) rte_bswap16((u16)(v))
+#define le_to_be32(v) rte_bswap32((u32)(v))
+#define le_to_be64(v) rte_bswap64((u64)(v))
+#define be_to_le16(v) rte_bswap16((u16)(v))
+#define be_to_le32(v) rte_bswap32((u32)(v))
+#define be_to_le64(v) rte_bswap64((u64)(v))
+
+#define npu_to_le16(v) (v)
+#define npu_to_le32(v) (v)
+#define npu_to_le64(v) (v)
+#define le_to_npu16(v) (v)
+#define le_to_npu32(v) (v)
+#define le_to_npu64(v) (v)
+
+#define npu_to_be16(v) le_to_be16((u16)(v))
+#define npu_to_be32(v) le_to_be32((u32)(v))
+#define npu_to_be64(v) le_to_be64((u64)(v))
+#define be_to_npu16(v) be_to_le16((u16)(v))
+#define be_to_npu32(v) be_to_le32((u32)(v))
+#define be_to_npu64(v) be_to_le64((u64)(v))
+#endif /* !cpu_to_le32 */
+
+static inline u16 REVERT_BIT_MASK16(u16 mask)
+{
+ mask = ((mask & 0x5555) << 1) | ((mask & 0xAAAA) >> 1);
+ mask = ((mask & 0x3333) << 2) | ((mask & 0xCCCC) >> 2);
+ mask = ((mask & 0x0F0F) << 4) | ((mask & 0xF0F0) >> 4);
+ return ((mask & 0x00FF) << 8) | ((mask & 0xFF00) >> 8);
+}
+
+static inline u32 REVERT_BIT_MASK32(u32 mask)
+{
+ mask = ((mask & 0x55555555) << 1) | ((mask & 0xAAAAAAAA) >> 1);
+ mask = ((mask & 0x33333333) << 2) | ((mask & 0xCCCCCCCC) >> 2);
+ mask = ((mask & 0x0F0F0F0F) << 4) | ((mask & 0xF0F0F0F0) >> 4);
+ mask = ((mask & 0x00FF00FF) << 8) | ((mask & 0xFF00FF00) >> 8);
+ return ((mask & 0x0000FFFF) << 16) | ((mask & 0xFFFF0000) >> 16);
+}
+
+static inline u64 REVERT_BIT_MASK64(u64 mask)
+{
+ mask = ((mask & 0x5555555555555555) << 1) |
+ ((mask & 0xAAAAAAAAAAAAAAAA) >> 1);
+ mask = ((mask & 0x3333333333333333) << 2) |
+ ((mask & 0xCCCCCCCCCCCCCCCC) >> 2);
+ mask = ((mask & 0x0F0F0F0F0F0F0F0F) << 4) |
+ ((mask & 0xF0F0F0F0F0F0F0F0) >> 4);
+ mask = ((mask & 0x00FF00FF00FF00FF) << 8) |
+ ((mask & 0xFF00FF00FF00FF00) >> 8);
+ mask = ((mask & 0x0000FFFF0000FFFF) << 16) |
+ ((mask & 0xFFFF0000FFFF0000) >> 16);
+ return ((mask & 0x00000000FFFFFFFF) << 32) |
+ ((mask & 0xFFFFFFFF00000000) >> 32);
+}
+
+#define IOMEM
+
+#define prefetch(x) rte_prefetch0(x)
+
+#define ARRAY_SIZE(x) ((int32_t)RTE_DIM(x))
+
+#ifndef MAX_UDELAY_MS
+#define MAX_UDELAY_MS 5
+#endif
+
+#define ETH_ADDR_LEN 6
+#define ETH_FCS_LEN 4
+
+/* Check whether address is multicast. This is little-endian specific check.*/
+#define NGBE_IS_MULTICAST(address) \
+ rte_is_multicast_ether_addr(address)
+
+/* Check whether an address is broadcast. */
+#define NGBE_IS_BROADCAST(address) \
+ rte_is_broadcast_ether_addr(address)
+
+#define ETH_P_8021Q 0x8100
+#define ETH_P_8021AD 0x88A8
+
+#endif /* _NGBE_OS_H_ */
new file mode 100644
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018-2020 Beijing WangXun Technology Co., Ltd.
+ * Copyright(c) 2010-2017 Intel Corporation
+ */
+
+#ifndef _NGBE_TYPE_H_
+#define _NGBE_TYPE_H_
+
+#define NGBE_ALIGN 128 /* as intel did */
+
+#include "ngbe_osdep.h"
+#include "ngbe_devids.h"
+
+struct ngbe_hw {
+ void IOMEM *hw_addr;
+ u16 device_id;
+ u16 vendor_id;
+ u16 sub_device_id;
+ u16 sub_system_id;
+ bool allow_unsupported_sfp;
+
+ uint64_t isb_dma;
+ void IOMEM *isb_mem;
+
+ bool is_pf;
+};
+
+#endif /* _NGBE_TYPE_H_ */
@@ -6,9 +6,11 @@
#include <rte_common.h>
#include <ethdev_pci.h>
-#include <base/ngbe_devids.h>
+#include "base/ngbe.h"
#include "ngbe_ethdev.h"
+static int ngbe_dev_close(struct rte_eth_dev *dev);
+
/*
* The set of PCI devices this driver supports
*/
@@ -32,12 +34,31 @@ static int
eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)
{
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
+ struct ngbe_hw *hw = NGBE_DEV_HW(eth_dev);
+ const struct rte_memzone *mz;
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
return 0;
rte_eth_copy_pci_info(eth_dev, pci_dev);
+ /* Vendor and Device ID need to be set before init of shared code */
+ hw->device_id = pci_dev->id.device_id;
+ hw->vendor_id = pci_dev->id.vendor_id;
+ hw->sub_system_id = pci_dev->id.subsystem_device_id;
+ ngbe_map_device_id(hw);
+ hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
+ hw->allow_unsupported_sfp = 1;
+
+ /* Reserve memory for interrupt status block */
+ mz = rte_eth_dma_zone_reserve(eth_dev, "ngbe_driver", -1,
+ 16, NGBE_ALIGN, SOCKET_ID_ANY);
+ if (mz == NULL)
+ return -ENOMEM;
+
+ hw->isb_dma = TMZ_PADDR(mz);
+ hw->isb_mem = TMZ_VADDR(mz);
+
return 0;
}
@@ -47,7 +68,7 @@ eth_ngbe_dev_uninit(struct rte_eth_dev *eth_dev)
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
return 0;
- RTE_SET_USED(eth_dev);
+ ngbe_dev_close(eth_dev);
return 0;
}
@@ -88,6 +109,17 @@ static struct rte_pci_driver rte_ngbe_pmd = {
.remove = eth_ngbe_pci_remove,
};
+/*
+ * Reset and stop device.
+ */
+static int
+ngbe_dev_close(struct rte_eth_dev *dev)
+{
+ RTE_SET_USED(dev);
+
+ return 0;
+}
+
RTE_PMD_REGISTER_PCI(net_ngbe, rte_ngbe_pmd);
RTE_PMD_REGISTER_PCI_TABLE(net_ngbe, pci_id_ngbe_map);
RTE_PMD_REGISTER_KMOD_DEP(net_ngbe, "* igb_uio | uio_pci_generic | vfio-pci");
@@ -10,6 +10,13 @@
* Structure to store private data for each driver instance (for each port).
*/
struct ngbe_adapter {
+ struct ngbe_hw hw;
};
+#define NGBE_DEV_ADAPTER(dev) \
+ ((struct ngbe_adapter *)(dev)->data->dev_private)
+
+#define NGBE_DEV_HW(dev) \
+ (&((struct ngbe_adapter *)(dev)->data->dev_private)->hw)
+
#endif /* _NGBE_ETHDEV_H_ */