[V4] config/arm: add Qualcomm Centriq 2400 part number
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Commit Message
0xc00 is for "SoC 2.0" Qualcomm Centriq servers.
0x800 is for "SoC 1.1".
Cc: Jerin Jacob <jerinj@marvell.com>
Cc: Ruifeng Wang <ruifeng.wang@arm.com>
Cc: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Cc: Juraj Linkeš <juraj.linkes@pantheon.tech>
Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
--
V2: add maintainers as Cc
V3: fix meson syntax for the SoC v1.1 machine description
V4: add new soc_centriq2400_v1_1 to the supported SoC list
---
config/arm/meson.build | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
@@ -179,7 +179,8 @@ implementer_qualcomm = {
['RTE_MAX_NUMA_NODES', 1]
],
'part_number_config': {
- '0xc00': {'machine_args': ['-march=armv8-a+crc']}
+ '0x800': {'machine_args': ['-march=armv8-a+crc']},
+ '0xc00': {'machine_args': ['-march=armv8-a+crc']},
}
}
@@ -223,8 +224,15 @@ soc_bluefield = {
'numa': false
}
+soc_centriq2400_v1_1 = {
+ 'description': 'Qualcomm Centriq 2400 (SoC v1.1)',
+ 'implementer': '0x51',
+ 'part_number': '0x800',
+ 'numa': false
+}
+
soc_centriq2400 = {
- 'description': 'Qualcomm Centriq 2400',
+ 'description': 'Qualcomm Centriq 2400 (SoC v2.0)',
'implementer': '0x51',
'part_number': '0xc00',
'numa': false
@@ -333,7 +341,8 @@ Start of SoCs list
generic: Generic un-optimized build for all aarch64 machines.
armada: Marvell ARMADA
bluefield: NVIDIA BlueField
-centriq2400: Qualcomm Centriq 2400
+soc_centriq2400_v1_1: Qualcomm Centriq 2400 (SoC v1.1)
+centriq2400: Qualcomm Centriq 2400 (SoC v2.0)
cn10k: Marvell OCTEON 10
dpaa: NXP DPAA
emag: Ampere eMAG
@@ -354,6 +363,7 @@ socs = {
'generic': soc_generic,
'armada': soc_armada,
'bluefield': soc_bluefield,
+ 'soc_centriq2400_v1_1': soc_centriq2400_v1_1,
'centriq2400': soc_centriq2400,
'cn10k' : soc_cn10k,
'dpaa': soc_dpaa,