diff mbox series

[1/3] net/mlx5: fix MPLS over IP

Message ID 3b4a9e1bef1e4465f59ed785e6f25a19a40acdd6.1625213344.git.jackmin@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series MPLS RSS fixs |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Jack Min July 2, 2021, 8:34 a.m. UTC 
  HW doesn't support match MPLS over IP traffic.

Remove related code.

Fixes: d1abe664ddde ("net/mlx5: add MPLS to Direct Verbs flow engine")
Cc: stable@dpdk.org

Signed-off-by: Xiaoyu Min <jackmin@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow.c    | 5 ++---
 drivers/net/mlx5/mlx5_flow_dv.c | 3 ---
 2 files changed, 2 insertions(+), 6 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index 3b7c94d92f..21032a29a3 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -2920,9 +2920,8 @@  mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
 					  "MPLS not supported or"
 					  " disabled in firmware"
 					  " configuration.");
-	/* MPLS over IP, UDP, GRE is allowed */
-	if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
-			    MLX5_FLOW_LAYER_OUTER_L4_UDP |
+	/* MPLS over UDP, GRE is allowed */
+	if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L4_UDP |
 			    MLX5_FLOW_LAYER_GRE |
 			    MLX5_FLOW_LAYER_GRE_KEY)))
 		return rte_flow_error_set(error, EINVAL,
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index a04a3c2bb8..86ba9ffde3 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -9032,9 +9032,6 @@  flow_dv_translate_item_mpls(void *matcher, void *key,
 			 RTE_ETHER_TYPE_MPLS);
 		break;
 	default:
-		MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
-		MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
-			 IPPROTO_MPLS);
 		break;
 	}
 	if (!in_mpls_v)