[dpdk-dev] eal/arm64: fix memory barrier macros

Message ID 20180115235934.16054-1-thomas@monjalon.net (mailing list archive)
State Superseded, archived
Headers

Checks

Context Check Description
ci/checkpatch warning coding style issues
ci/Intel-compilation fail Compilation issues

Commit Message

Thomas Monjalon Jan. 15, 2018, 11:59 p.m. UTC
  The macros dsb and dmb are defined as an instruction block with braces.
As a consequence, when it is used in if/else without brace:
	if (cond)
		rte_mb();
	else
		statement;
the added semicolon is parsed outside of if/else,
so the "else" cannot match the "if":
	if (cond) {
		asm volatile("dsb sy" : : : "memory");
	}
	;
	else
		statement

The solution is either to use the "do { } while (0)" construct,
or simply remove the braces because there is only one statement.

Fixes: 84733fd0d75e ("eal/arm64: fix memory barrier definition")

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
---
 lib/librte_eal/common/include/arch/arm/rte_atomic_64.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
  

Comments

Thomas Monjalon Jan. 16, 2018, 12:21 a.m. UTC | #1
16/01/2018 00:59, Thomas Monjalon:
> The macros dsb and dmb are defined as an instruction block with braces.
> As a consequence, when it is used in if/else without brace:
> 	if (cond)
> 		rte_mb();
> 	else
> 		statement;
> the added semicolon is parsed outside of if/else,
> so the "else" cannot match the "if":
> 	if (cond) {
> 		asm volatile("dsb sy" : : : "memory");
> 	}
> 	;
> 	else
> 		statement
> 
> The solution is either to use the "do { } while (0)" construct,
> or simply remove the braces because there is only one statement.
> 
> Fixes: 84733fd0d75e ("eal/arm64: fix memory barrier definition")

Just seen there is already a patch doing the same thing by Jia He:
	https://dpdk.org/patch/31896
This patch is in a series waiting for required changes.
  

Patch

diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
index b6bbd0b32..b012dfa74 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
@@ -15,8 +15,8 @@  extern "C" {
 
 #include "generic/rte_atomic.h"
 
-#define dsb(opt)  { asm volatile("dsb " #opt : : : "memory"); }
-#define dmb(opt)  { asm volatile("dmb " #opt : : : "memory"); }
+#define dsb(opt)  asm volatile("dsb " #opt : : : "memory")
+#define dmb(opt)  asm volatile("dmb " #opt : : : "memory")
 
 #define rte_mb() dsb(sy)