Attachment #31 for bug #35

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#if defined(RTE_ARCH_X86)
#include <sys/io.h>
#if defined(__GLIBC__)
#define pci_uio_outl_p outl_p
#define pci_uio_outw_p outw_p
#define pci_uio_outb_p outb_p
#else
static inline void
pci_uio_outl_p(unsigned int value, unsigned short int port)
{
  __asm__ __volatile__ ("outl %0,%w1\noutb %%al,$0x80": :"a" (value),
			"Nd" (port));
}

static inline void
pci_uio_outw_p(unsigned short int value, unsigned short int port)
{
  __asm__ __volatile__ ("outw %w0,%w1\noutb %%al,$0x80": :"a" (value),
			"Nd" (port));
}

static inline void
pci_uio_outb_p(unsigned char value, unsigned short int port)
{
  __asm__ __volatile__ ("outb %b0,%w1\noutb %%al,$0x80": :"a" (value),
			"Nd" (port));
}
#endif
#endif

#include <rte_log.h>

		if (len >= 4) {
			size = 4;
#if defined(RTE_ARCH_X86)
			pci_uio_outl_p(*(const uint32_t *)s, reg);
#else
			*(volatile uint32_t *)reg = *(const uint32_t *)s;
#endif
		} else if (len >= 2) {
			size = 2;
#if defined(RTE_ARCH_X86)
			pci_uio_outw_p(*(const uint16_t *)s, reg);
#else
			*(volatile uint16_t *)reg = *(const uint16_t *)s;
#endif
		} else {
			size = 1;
#if defined(RTE_ARCH_X86)
			pci_uio_outb_p(*s, reg);
#else
			*(volatile uint8_t *)reg = *s;
#endif
- 

Return to bug 35

Lines 14-19 Link Here

(-)a/drivers/bus/pci/linux/pci_uio.c (-4 / +29 lines)
14		14
15	#if defined(RTE_ARCH_X86)	15	#if defined(RTE_ARCH_X86)
16	#include <sys/io.h>	16	#include <sys/io.h>
		17	#if defined(__GLIBC__)
		18	#define pci_uio_outl_p outl_p
		19	#define pci_uio_outw_p outw_p
		20	#define pci_uio_outb_p outb_p
		21	#else
		22	static inline void
		23	pci_uio_outl_p(unsigned int value, unsigned short int port)
		24	{
		25	__asm__ __volatile__ ("outl %0,%w1\noutb %%al,$0x80": :"a" (value),
		26	"Nd" (port));
		27	}
		28
		29	static inline void
		30	pci_uio_outw_p(unsigned short int value, unsigned short int port)
		31	{
		32	__asm__ __volatile__ ("outw %w0,%w1\noutb %%al,$0x80": :"a" (value),
		33	"Nd" (port));
		34	}
		35
		36	static inline void
		37	pci_uio_outb_p(unsigned char value, unsigned short int port)
		38	{
		39	__asm__ __volatile__ ("outb %b0,%w1\noutb %%al,$0x80": :"a" (value),
		40	"Nd" (port));
		41	}
		42	#endif
17	#endif	43	#endif
18		44
19	#include <rte_log.h>	45	#include <rte_log.h>
Lines 527-547 pci_uio_ioport_write(struct rte_pci_ioport *p, Link Here
527	if (len >= 4) {	553	if (len >= 4) {
528	size = 4;	554	size = 4;
529	#if defined(RTE_ARCH_X86)	555	#if defined(RTE_ARCH_X86)
530	outl_p((const uint32_t )s, reg);	556	pci_uio_outl_p((const uint32_t )s, reg);
531	#else	557	#else
532	(volatile uint32_t )reg = (const uint32_t )s;	558	(volatile uint32_t )reg = (const uint32_t )s;
533	#endif	559	#endif
534	} else if (len >= 2) {	560	} else if (len >= 2) {
535	size = 2;	561	size = 2;
536	#if defined(RTE_ARCH_X86)	562	#if defined(RTE_ARCH_X86)
537	outw_p((const uint16_t )s, reg);	563	pci_uio_outw_p((const uint16_t )s, reg);
538	#else	564	#else
539	(volatile uint16_t )reg = (const uint16_t )s;	565	(volatile uint16_t )reg = (const uint16_t )s;
540	#endif	566	#endif
541	} else {	567	} else {
542	size = 1;	568	size = 1;
543	#if defined(RTE_ARCH_X86)	569	#if defined(RTE_ARCH_X86)
544	outb_p(*s, reg);	570	pci_uio_outb_p(*s, reg);
545	#else	571	#else
546	(volatile uint8_t )reg = *s;	572	(volatile uint8_t )reg = *s;
547	#endif	573	#endif
548	-