The Intel 82599 data sheet (https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/82599-10-gbe-controller-datasheet.pdf, §8.2.3.8.8) states that the RDRXCTL register's RSCACKC (bit 25) and FCOE_WRFIX (bit 26) values, while reserved, should be set to 1 by software. The ixgbe driver does not do that, e.g. in ixgbe_dev_rx_init (http://dpdk.org/browse/dpdk/tree/drivers/net/ixgbe/ixgbe_rxtx.c?h=v18.02#n4855).
On Sun, 01 Apr 2018 12:42:38 +0000 bugzilla@dpdk.org wrote: > https://dpdk.org/tracker/show_bug.cgi?id=22 > > Bug ID: 22 > Summary: Ixgbe driver sets RDRXCTL with the wrong RSCACKC and > FCOE_WRFIX values > Product: DPDK > Version: unspecified > Hardware: All > OS: All > Status: CONFIRMED > Severity: normal > Priority: Normal > Component: ethdev > Assignee: dev@dpdk.org > Reporter: solal.pirelli@gmail.com > Target Milestone: --- > > The Intel 82599 data sheet > > (https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/82599-10-gbe-controller-datasheet.pdf, > §8.2.3.8.8) states that the RDRXCTL register's RSCACKC (bit 25) and > FCOE_WRFIX > (bit 26) values, while reserved, should be set to 1 by software. > > The ixgbe driver does not do that, e.g. in ixgbe_dev_rx_init > > (http://dpdk.org/browse/dpdk/tree/drivers/net/ixgbe/ixgbe_rxtx.c?h=v18.02#n4855). It is done elsewhere. static int ixgbe_set_rsc(struct rte_eth_dev *dev) { ... /* Set RDRXCTL.RSCACKC bit */ rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); rdrxctl |= IXGBE_RDRXCTL_RSCACKC; IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
Konstantin, Can you check this one as well? Thanks
(In reply to Solal Pirelli from comment #0) > The Intel 82599 data sheet > (https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/ > 82599-10-gbe-controller-datasheet.pdf, §8.2.3.8.8) states that the RDRXCTL > register's RSCACKC (bit 25) and FCOE_WRFIX (bit 26) values, while reserved, > should be set to 1 by software. > > The ixgbe driver does not do that, e.g. in ixgbe_dev_rx_init > (http://dpdk.org/browse/dpdk/tree/drivers/net/ixgbe/ixgbe_rxtx.c?h=v18. > 02#n4855). I agree with the point of Stephen Hemminger, in function ixgbe_set_rsc(), it ahs set IXGBE_RDRXCTL_RSCACKC bit to 1. For bit FCOE_WRFIX, it has no abnormal phenomenon for not having the operation. So it is not a bug, and change state to resolve and wontfix.
it is not a bug, and change state to resolve and wontfix.