patch 'net/iavf: fix mbuf release in multi-process' has been queued to stable release 20.11.6
Xueming Li
xuemingl at nvidia.com
Tue Jun 21 10:02:45 CEST 2022
Hi,
FYI, your patch has been queued to stable release 20.11.6
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 06/23/22. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/steevenlee/dpdk
This queued commit can be viewed at:
https://github.com/steevenlee/dpdk/commit/7ec8629367d742344b5a725ade2f3d987ff52f9f
Thanks.
Xueming Li <xuemingl at nvidia.com>
---
>From 7ec8629367d742344b5a725ade2f3d987ff52f9f Mon Sep 17 00:00:00 2001
From: Ke Zhang <ke1x.zhang at intel.com>
Date: Thu, 19 May 2022 07:36:04 +0000
Subject: [PATCH] net/iavf: fix mbuf release in multi-process
Cc: Xueming Li <xuemingl at nvidia.com>
[ upstream commit fced83c1229e0ad89f26d07fa7bd46b8767d9f5c ]
In the multiple process environment, the subprocess operates on the
shared memory and changes the function pointer of the main process,
resulting in the failure to find the address of the function when main
process releasing, resulting in crash.
Fixes: 319c421f3890 ("net/avf: enable SSE Rx Tx")
Signed-off-by: Ke Zhang <ke1x.zhang at intel.com>
Acked-by: Qi Zhang <qi.z.zhang at intel.com>
---
drivers/net/iavf/iavf_rxtx.c | 36 ++++++++++++++++---------
drivers/net/iavf/iavf_rxtx.h | 11 ++++++++
drivers/net/iavf/iavf_rxtx_vec_avx512.c | 8 ++----
drivers/net/iavf/iavf_rxtx_vec_sse.c | 16 +++--------
4 files changed, 41 insertions(+), 30 deletions(-)
diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c
index 516a1684c2..7689d7fa46 100644
--- a/drivers/net/iavf/iavf_rxtx.c
+++ b/drivers/net/iavf/iavf_rxtx.c
@@ -326,12 +326,24 @@ release_txq_mbufs(struct iavf_tx_queue *txq)
}
}
-static const struct iavf_rxq_ops def_rxq_ops = {
- .release_mbufs = release_rxq_mbufs,
+static const
+struct iavf_rxq_ops iavf_rxq_release_mbufs_ops[] = {
+ [IAVF_REL_MBUFS_DEFAULT].release_mbufs = release_rxq_mbufs,
+#ifdef RTE_ARCH_X86
+ [IAVF_REL_MBUFS_SSE_VEC].release_mbufs = iavf_rx_queue_release_mbufs_sse,
+#endif
};
-static const struct iavf_txq_ops def_txq_ops = {
- .release_mbufs = release_txq_mbufs,
+static const
+struct iavf_txq_ops iavf_txq_release_mbufs_ops[] = {
+ [IAVF_REL_MBUFS_DEFAULT].release_mbufs = release_txq_mbufs,
+#ifdef RTE_ARCH_X86
+ [IAVF_REL_MBUFS_SSE_VEC].release_mbufs = iavf_tx_queue_release_mbufs_sse,
+#ifdef CC_AVX512_SUPPORT
+ [IAVF_REL_MBUFS_AVX512_VEC].release_mbufs = iavf_tx_queue_release_mbufs_avx512,
+#endif
+#endif
+
};
static inline void
@@ -610,7 +622,7 @@ iavf_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
rxq->q_set = true;
dev->data->rx_queues[queue_idx] = rxq;
rxq->qrx_tail = hw->hw_addr + IAVF_QRX_TAIL1(rxq->queue_id);
- rxq->ops = &def_rxq_ops;
+ rxq->rel_mbufs_type = IAVF_REL_MBUFS_DEFAULT;
if (check_rx_bulk_allow(rxq) == true) {
PMD_INIT_LOG(DEBUG, "Rx Burst Bulk Alloc Preconditions are "
@@ -721,7 +733,7 @@ iavf_dev_tx_queue_setup(struct rte_eth_dev *dev,
txq->q_set = true;
dev->data->tx_queues[queue_idx] = txq;
txq->qtx_tail = hw->hw_addr + IAVF_QTX_TAIL1(queue_idx);
- txq->ops = &def_txq_ops;
+ txq->rel_mbufs_type = IAVF_REL_MBUFS_DEFAULT;
if (check_tx_vec_allow(txq) == false) {
struct iavf_adapter *ad =
@@ -837,7 +849,7 @@ iavf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
}
rxq = dev->data->rx_queues[rx_queue_id];
- rxq->ops->release_mbufs(rxq);
+ iavf_rxq_release_mbufs_ops[rxq->rel_mbufs_type].release_mbufs(rxq);
reset_rx_queue(rxq);
dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
@@ -865,7 +877,7 @@ iavf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
}
txq = dev->data->tx_queues[tx_queue_id];
- txq->ops->release_mbufs(txq);
+ iavf_txq_release_mbufs_ops[txq->rel_mbufs_type].release_mbufs(txq);
reset_tx_queue(txq);
dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
@@ -880,7 +892,7 @@ iavf_dev_rx_queue_release(void *rxq)
if (!q)
return;
- q->ops->release_mbufs(q);
+ iavf_rxq_release_mbufs_ops[q->rel_mbufs_type].release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(q);
@@ -894,7 +906,7 @@ iavf_dev_tx_queue_release(void *txq)
if (!q)
return;
- q->ops->release_mbufs(q);
+ iavf_txq_release_mbufs_ops[q->rel_mbufs_type].release_mbufs(q);
rte_free(q->sw_ring);
rte_memzone_free(q->mz);
rte_free(q);
@@ -928,7 +940,7 @@ iavf_stop_queues(struct rte_eth_dev *dev)
txq = dev->data->tx_queues[i];
if (!txq)
continue;
- txq->ops->release_mbufs(txq);
+ iavf_txq_release_mbufs_ops[txq->rel_mbufs_type].release_mbufs(txq);
reset_tx_queue(txq);
dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED;
}
@@ -936,7 +948,7 @@ iavf_stop_queues(struct rte_eth_dev *dev)
rxq = dev->data->rx_queues[i];
if (!rxq)
continue;
- rxq->ops->release_mbufs(rxq);
+ iavf_rxq_release_mbufs_ops[rxq->rel_mbufs_type].release_mbufs(rxq);
reset_rx_queue(rxq);
dev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED;
}
diff --git a/drivers/net/iavf/iavf_rxtx.h b/drivers/net/iavf/iavf_rxtx.h
index 5b24d2ca29..557a7e46a7 100644
--- a/drivers/net/iavf/iavf_rxtx.h
+++ b/drivers/net/iavf/iavf_rxtx.h
@@ -166,6 +166,7 @@ struct iavf_rx_queue {
struct rte_mbuf *pkt_last_seg; /* last segment of current packet */
struct rte_mbuf fake_mbuf; /* dummy mbuf */
uint8_t rxdid;
+ uint8_t rel_mbufs_type;
/* used for VPMD */
uint16_t rxrearm_nb; /* number of remaining to be re-armed */
@@ -220,6 +221,7 @@ struct iavf_tx_queue {
uint16_t last_desc_cleaned; /* last desc have been cleaned*/
uint16_t free_thresh;
uint16_t rs_thresh;
+ uint8_t rel_mbufs_type;
uint16_t port_id;
uint16_t queue_id;
@@ -324,6 +326,12 @@ struct iavf_32b_rx_flex_desc_comms_ovs {
} flex_ts;
};
+enum iavf_rxtx_rel_mbufs_type {
+ IAVF_REL_MBUFS_DEFAULT = 0,
+ IAVF_REL_MBUFS_SSE_VEC = 1,
+ IAVF_REL_MBUFS_AVX512_VEC = 2,
+};
+
/* Receive Flex Descriptor profile IDs: There are a total
* of 64 profiles where profile IDs 0/1 are for legacy; and
* profiles 2-63 are flex profiles that can be programmed
@@ -483,6 +491,9 @@ int iavf_txq_vec_setup_avx512(struct iavf_tx_queue *txq);
uint8_t iavf_proto_xtr_type_to_rxdid(uint8_t xtr_type);
void iavf_set_default_ptype_table(struct rte_eth_dev *dev);
+void iavf_tx_queue_release_mbufs_avx512(struct iavf_tx_queue *txq);
+void iavf_rx_queue_release_mbufs_sse(struct iavf_rx_queue *rxq);
+void iavf_tx_queue_release_mbufs_sse(struct iavf_tx_queue *txq);
static inline
void iavf_dump_rx_descriptor(struct iavf_rx_queue *rxq,
diff --git a/drivers/net/iavf/iavf_rxtx_vec_avx512.c b/drivers/net/iavf/iavf_rxtx_vec_avx512.c
index f61681474c..d56a523940 100644
--- a/drivers/net/iavf/iavf_rxtx_vec_avx512.c
+++ b/drivers/net/iavf/iavf_rxtx_vec_avx512.c
@@ -1681,7 +1681,7 @@ iavf_xmit_pkts_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
return nb_tx;
}
-static inline void
+void __rte_cold
iavf_tx_queue_release_mbufs_avx512(struct iavf_tx_queue *txq)
{
unsigned int i;
@@ -1701,13 +1701,9 @@ iavf_tx_queue_release_mbufs_avx512(struct iavf_tx_queue *txq)
}
}
-static const struct iavf_txq_ops avx512_vec_txq_ops = {
- .release_mbufs = iavf_tx_queue_release_mbufs_avx512,
-};
-
int __rte_cold
iavf_txq_vec_setup_avx512(struct iavf_tx_queue *txq)
{
- txq->ops = &avx512_vec_txq_ops;
+ txq->rel_mbufs_type = IAVF_REL_MBUFS_AVX512_VEC;
return 0;
}
diff --git a/drivers/net/iavf/iavf_rxtx_vec_sse.c b/drivers/net/iavf/iavf_rxtx_vec_sse.c
index e9ea17842f..b3ea8bc86d 100644
--- a/drivers/net/iavf/iavf_rxtx_vec_sse.c
+++ b/drivers/net/iavf/iavf_rxtx_vec_sse.c
@@ -1198,37 +1198,29 @@ iavf_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
return nb_tx;
}
-static void __rte_cold
+void __rte_cold
iavf_rx_queue_release_mbufs_sse(struct iavf_rx_queue *rxq)
{
_iavf_rx_queue_release_mbufs_vec(rxq);
}
-static void __rte_cold
+void __rte_cold
iavf_tx_queue_release_mbufs_sse(struct iavf_tx_queue *txq)
{
_iavf_tx_queue_release_mbufs_vec(txq);
}
-static const struct iavf_rxq_ops sse_vec_rxq_ops = {
- .release_mbufs = iavf_rx_queue_release_mbufs_sse,
-};
-
-static const struct iavf_txq_ops sse_vec_txq_ops = {
- .release_mbufs = iavf_tx_queue_release_mbufs_sse,
-};
-
int __rte_cold
iavf_txq_vec_setup(struct iavf_tx_queue *txq)
{
- txq->ops = &sse_vec_txq_ops;
+ txq->rel_mbufs_type = IAVF_REL_MBUFS_SSE_VEC;
return 0;
}
int __rte_cold
iavf_rxq_vec_setup(struct iavf_rx_queue *rxq)
{
- rxq->ops = &sse_vec_rxq_ops;
+ rxq->rel_mbufs_type = IAVF_REL_MBUFS_SSE_VEC;
return iavf_rxq_vec_setup_default(rxq);
}
--
2.35.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2022-06-21 15:37:53.654301751 +0800
+++ 0099-net-iavf-fix-mbuf-release-in-multi-process.patch 2022-06-21 15:37:49.214451878 +0800
@@ -1 +1 @@
-From fced83c1229e0ad89f26d07fa7bd46b8767d9f5c Mon Sep 17 00:00:00 2001
+From 7ec8629367d742344b5a725ade2f3d987ff52f9f Mon Sep 17 00:00:00 2001
@@ -4,0 +5,3 @@
+Cc: Xueming Li <xuemingl at nvidia.com>
+
+[ upstream commit fced83c1229e0ad89f26d07fa7bd46b8767d9f5c ]
@@ -12 +14,0 @@
-Cc: stable at dpdk.org
@@ -24 +26 @@
-index 73e4960257..ff0c98ffc3 100644
+index 516a1684c2..7689d7fa46 100644
@@ -27 +29 @@
-@@ -362,12 +362,24 @@ release_txq_mbufs(struct iavf_tx_queue *txq)
+@@ -326,12 +326,24 @@ release_txq_mbufs(struct iavf_tx_queue *txq)
@@ -56 +58 @@
-@@ -681,7 +693,7 @@ iavf_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
+@@ -610,7 +622,7 @@ iavf_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
@@ -65 +67 @@
-@@ -821,7 +833,7 @@ iavf_dev_tx_queue_setup(struct rte_eth_dev *dev,
+@@ -721,7 +733,7 @@ iavf_dev_tx_queue_setup(struct rte_eth_dev *dev,
@@ -74 +76 @@
-@@ -953,7 +965,7 @@ iavf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
+@@ -837,7 +849,7 @@ iavf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
@@ -83 +85 @@
-@@ -981,7 +993,7 @@ iavf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
+@@ -865,7 +877,7 @@ iavf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
@@ -92 +94 @@
-@@ -996,7 +1008,7 @@ iavf_dev_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid)
+@@ -880,7 +892,7 @@ iavf_dev_rx_queue_release(void *rxq)
@@ -101 +103 @@
-@@ -1010,7 +1022,7 @@ iavf_dev_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid)
+@@ -894,7 +906,7 @@ iavf_dev_tx_queue_release(void *txq)
@@ -110 +112 @@
-@@ -1044,7 +1056,7 @@ iavf_stop_queues(struct rte_eth_dev *dev)
+@@ -928,7 +940,7 @@ iavf_stop_queues(struct rte_eth_dev *dev)
@@ -119 +121 @@
-@@ -1052,7 +1064,7 @@ iavf_stop_queues(struct rte_eth_dev *dev)
+@@ -936,7 +948,7 @@ iavf_stop_queues(struct rte_eth_dev *dev)
@@ -129 +131 @@
-index 642b9a700a..e8362bbd1d 100644
+index 5b24d2ca29..557a7e46a7 100644
@@ -132 +134 @@
-@@ -190,6 +190,7 @@ struct iavf_rx_queue {
+@@ -166,6 +166,7 @@ struct iavf_rx_queue {
@@ -140 +142 @@
-@@ -249,6 +250,7 @@ struct iavf_tx_queue {
+@@ -220,6 +221,7 @@ struct iavf_tx_queue {
@@ -148,2 +150,2 @@
-@@ -392,6 +394,12 @@ struct iavf_32b_rx_flex_desc_comms_ipsec {
- __le32 ipsec_said;
+@@ -324,6 +326,12 @@ struct iavf_32b_rx_flex_desc_comms_ovs {
+ } flex_ts;
@@ -161 +163 @@
-@@ -695,6 +703,9 @@ int iavf_txq_vec_setup_avx512(struct iavf_tx_queue *txq);
+@@ -483,6 +491,9 @@ int iavf_txq_vec_setup_avx512(struct iavf_tx_queue *txq);
@@ -172 +174 @@
-index 7319d4cb65..3bfec63851 100644
+index f61681474c..d56a523940 100644
@@ -175,2 +177,2 @@
-@@ -1992,7 +1992,7 @@ iavf_xmit_pkts_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
- return iavf_xmit_pkts_vec_avx512_cmn(tx_queue, tx_pkts, nb_pkts, false);
+@@ -1681,7 +1681,7 @@ iavf_xmit_pkts_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
+ return nb_tx;
@@ -184 +186 @@
-@@ -2012,14 +2012,10 @@ iavf_tx_queue_release_mbufs_avx512(struct iavf_tx_queue *txq)
+@@ -1701,13 +1701,9 @@ iavf_tx_queue_release_mbufs_avx512(struct iavf_tx_queue *txq)
@@ -199 +200,0 @@
-
@@ -201 +202 @@
-index 717a227b2c..4a5232c1d2 100644
+index e9ea17842f..b3ea8bc86d 100644
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